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Microarchitecture
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11	Computer Systems A Programmer’s Perspective, Second Edition 1 Randal E. Bryant David R. O’Hallaron January 13, 2010 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2010-02-14 13:34:53 Computing Computer architecture Computer engineering Central processing unit Cache Computer memory Processor register Microarchitecture Cache memory Optimizing compiler Instruction set Locality of reference
12	Copyright 1999 IEEE. Published in the Proceedings of the Thirty-Third Asilomar Conference on Signals, Systems, and Computers, October, Pacific Grove, CA, USA. Real-Time High-Throughput Sonar Beamforming Kernel Add to Reading List Source URL: bevo.duckdns.org Language: English - Date: 2010-02-15 01:30:13 Computer architecture Computing Computer engineering Compiler optimizations Software pipelining Optimizing compiler UltraSPARC Loop unrolling SPARC Visual Instruction Set Microarchitecture 64-bit computing
13	IEEE TRANSACTIONS ON COMPUTERS, VOL. 63, NO. XX, Application-Adaptive Guardbanding to Mitigate Static and Dynamic Variability Add to Reading List Source URL: mesl.ucsd.edu Language: English - Date: 2014-04-29 20:45:28 Computer architecture Computing Computer engineering Central processing unit Static timing analysis Bubble Parallel computing Instruction set Microarchitecture Clock signal Optimizing compiler ARM architecture
14	OpenTransputer: Reinventing a parallel machine from the past Student: David Keller, Andres Amaya Garcia, Supervisor: Prof. David May, Project Type: Enterprise University of Bristol, Department of Computer Science Introdu Add to Reading List Source URL: wordpress-transputeriot.rhcloud.com Language: English - Date: 2015-03-30 10:27:16 Computing Computer hardware Computer architecture Parallel computing Microprocessors Central processing unit Transputer Supercomputers David May Inmos Microarchitecture Microcode
15	CO1016 Computer Systems Credits: 20 Convenor: Dr. R. Crole Semester: 1st Add to Reading List Source URL: www.cs.le.ac.uk Language: English - Date: 2015-07-10 06:50:24 Computer architecture Computing Computer engineering Central processing unit MIPS instruction set Computer Multi-core processor Microarchitecture Instruction set Processor register Digital electronics 64-bit computing
16	The Future of the Message-Passing Interface William Gropp www.cs.illinois.edu/~wgropp MPI and Supercomputing Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2015-03-11 11:43:40 Computing Concurrent computing Parallel computing Computer architecture Multi-core processor Message Passing Interface Blue Gene SIMD Supercomputer Microarchitecture Stream processing Xeon Phi
17	21st International Conference on VLSI Design Watermarking Video Clips with Workload Information for DVS Yicheng Huang Samarjit Chakraborty Ye Wang Add to Reading List Source URL: www.smcnus.org Language: English - Date: 2013-09-27 01:18:40 Computing Computer architecture Data compression Microprocessors Video compression Video acceleration Image compression H.262/MPEG-2 Part 2 Microarchitecture Macroblock Multi-core processor
18	Using Offline Bitstream Analysis for Power-Aware Video Decoding in Portable Devices Yicheng Huang Samarjit Chakraborty Add to Reading List Source URL: www.smcnus.org Language: English - Date: 2013-09-27 01:18:39 Computing Computer architecture Central processing unit Computer hardware Microprocessors Video acceleration Parallel computing Multi-core processor Microarchitecture CPU cache Frequency scaling
19	Under 100-cycle Thread Migration Latency in a Single-ISA Heterogeneous Multi-core Processor Elliott Forbes, Zhenqian Zhang, Randy Widialaksono, Brandon Dwiel, Rangeen Basu Roy Chowdhury, Vinesh Srinivasan, Steve Lipa, Er Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2015-08-21 02:18:29 Central processing unit Microprocessors Computer architecture Parallel computing Instruction set architectures Multi-core processor ARM architecture Microarchitecture ARM Cortex-A15 AMD 10h ARM big.LITTLE Processor register
20	Advanced Parallel Architecture Lesson 2 Annalisa Massini Introduction Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-03-03 11:01:50 Parallel computing Central processing unit Microprocessors Instruction set architectures Classes of computers Bit-level parallelism Reduced instruction set computing Instruction-level parallelism 64-bit computing Instruction set Very long instruction word Microarchitecture