TimeCube: A Manycore Embedded Processor with Interference-Agnostic Progress Tracking Anshuman Gupta Jack Sampson

Source URL: cseweb.ucsd.edu

Energy Efficient Seismic Wave Propagation Simulation on a Low-power Manycore Processor. Marcio Castro, Fabrice Dupros, Emilio Francesquini, Jean-Fran¸cois Mehaut, Philippe Olivier Alexandre Navaux To cite this version:

Source URL: hal-brgm.archives-ouvertes.fr

Roofline Model Toolkit: A Practical Tool for Architectural and Program Analysis Yu Jung Lo, Samuel Williams, Brian Van Straalen, Terry J. Ligocki, Matthew J. Cordery, Nicholas J. Wright, Mary W. Hall, and Leonid Oliker U

Source URL: www.dcs.warwick.ac.uk

• Computing
• Concurrent computing
• Parallel computing
• Computer programming
• OpenMP
• Roofline model
• Multi-core processor
• Manycore processor
• Thread
• Benchmark
• CUDA
• Data parallelism

Programming for Future 3D Architectures with Manycore Introduction The shift from Systems-on-Chip (SoC) to manycore architectures brings new hardware and software challenges ranging from seamless integration of processo

Source URL: www.pro3d.eu

• Computing
• Engineering
• Parallel computing
• Computer engineering
• Computer architecture
• Manycore processors
• Microprocessors
• Emerging technologies
• Multi-core processor
• Computer-aided design
• Three-dimensional integrated circuit
• 3D modeling

Gyrokinetic Particle-in-Cell Optimization on Emerging Multi- and Manycore Platforms Kamesh Madduria , Eun-Jin Imb , Khaled Z. Ibrahima , Samuel Williamsa , St´ephane Ethierc , Leonid Olikera a Computational

Source URL: crd.lbl.gov

• Computer architecture
• Computing
• Computer engineering
• Parallel computing
• Opteron
• Video cards
• Instruction set architectures
• Xeon
• Intel Core
• Cell
• Multi-core processor
• Fermi

® Kalray MPPA Massively Parallel Processor Array Revisiting DSP Acceleration with the Kalray MPPA Manycore Processor Benoît Dupont de Dinechin, CTO

Source URL: www.hotchips.org

• Computing
• Parallel computing
• Computer architecture
• Manycore processors
• Digital signal processing
• Microprocessors
• Massively parallel processor array
• Multi-core processor
• Xeon Phi
• Massively parallel
• Digital signal processor
• Very long instruction word

Data-Aware Task Scheduling on Multi-Accelerator based Platforms C´edric Augonnet, J´erˆome Clet-Ortega, Samuel Thibault, Raymond Namyst To cite this version: C´edric Augonnet, J´erˆome Clet-Ortega, Samuel Thibault,

Source URL: hal.inria.fr

• Computing
• Concurrent computing
• Parallel computing
• Computer architecture
• GPU cluster
• General-purpose computing on graphics processing units
• Data parallelism
• Graphics processing unit
• Manycore processor
• Multi-core processor
• Computer cluster
• Coprocessor

High-Performance and Scalable Designs of Programming Models for Exascale Systems Talk at HPCAC-Switzerland (Marby Dhabaleswar K. (DK) Panda The Ohio State University

Source URL: www.hpcadvisorycouncil.com

• Computing
• Parallel computing
• Message Passing Interface
• Partitioned global address space
• Multi-core processor
• Xeon Phi
• K computer
• SHMEM
• Manycore processor

Proceedings of the International MultiConference of Engineers and Computer Scientists 2012 Vol II, IMECS 2012, March, 2012, Hong Kong CPU-GPU Hybrid Parallel Binomial American Option Pricing Nan Zhang, Eng Gee Li

Source URL: www.bpti.lt

• Parallel computing
• Computing
• Computer architecture
• Computer engineering
• Graphics processing unit
• Multi-core processor
• Thread block
• Manycore processor
• General-purpose computing on graphics processing units

The Desktop is Dead, Long Live the Workstation! Aaron Knoll, Carson Brownlee, Khairi Reda, Brian Haymore, Michael E. Papka, Valerio Pascucci Fig. 1. Left: “Usable” vis lab concept. A SMP workstation with 4–8 manyco

Source URL: vis.ninja

• Computing
• Computer engineering
• Computer architecture
• Parallel computing
• Computational science
• Visualization
• Computer graphics
• Workstation
• Volume rendering
• Manycore processor
• Graphics processing unit
• Interactive visualization