Lightweight Coprocessor for Koblitz Curves: 283-bit ECC Including Scalar Conversion with only 4300 Gates S. Sinha Roy, , I. Verbauwhede

Source URL: users.ics.aalto.fi

Exploring Energy Scalability in Coprocessor-Dominated Architectures for Dark Silicon QIAOSHI ZHENG, University of California, San Diego and Northwestern Polytechnical University, China NATHAN GOULDING-HOTTA, SCOTT RICKE

Source URL: cseweb.ucsd.edu

Cell GC: Using the Cell Synergistic Processor as a Garbage Collection Coprocessor

Source URL: vee08.cs.tcd.ie

Data-Aware Task Scheduling on Multi-Accelerator based Platforms C´edric Augonnet, J´erˆome Clet-Ortega, Samuel Thibault, Raymond Namyst To cite this version: C´edric Augonnet, J´erˆome Clet-Ortega, Samuel Thibault,

Source URL: hal.inria.fr

• Computing
• Concurrent computing
• Parallel computing
• Computer architecture
• GPU cluster
• General-purpose computing on graphics processing units
• Data parallelism
• Graphics processing unit
• Manycore processor
• Multi-core processor
• Computer cluster
• Coprocessor

Computational Science and Engineering (Int. Master’s Program) Technische Universit¨at M¨ unchen Parallel, Dynamically Adaptive 2.5D

Source URL: www5.in.tum.de

• Computing
• Computer architecture
• Parallel computing
• Computer engineering
• Xeon Phi
• Xeon
• OpenMP
• 512-bit
• Coprocessor
• Intel Fortran Compiler
• Intel Advisor

Two Architecture Approaches for MILS Systems in Mobility Domains (Automobile, Railway and Avionik) Daniel Adam BMW Forschung und Technik Sergey Tverdyshev

Source URL: mils-workshop.euromils.eu

• Computer architecture
• Software
• Computing
• Hardware virtualization
• PikeOS
• X86 virtualization
• Hypervisor
• Virtualization
• Coprocessor
• Virtual machine
• Hyper-V
• ARM architecture

MIPS Assembly Language Programmer’s Guide ASM-01-DOC Your comments on our products and publications

Source URL: www.tik.ee.ethz.ch

• Computer architecture
• Computing
• Computer engineering
• Central processing unit
• Instruction set architectures
• Assembly languages
• Programming language implementation
• Reduced instruction set computing
• IBM Basic assembly language and successors
• Processor register
• Instruction set
• Coprocessor

ISSN No: International Journal & Magazine of Engineering, Technology, Management and Research A Peer Reviewed Open Access International Journal

Source URL: www.ijmetmr.com

• Image processing
• Reconfigurable computing
• Xilinx
• MicroBlaze
• Field-programmable gate array
• Background subtraction
• Soft microprocessor
• Embedded system
• Image segmentation
• Motion detection
• Coprocessor

Finding an adequate escape pod to real time Augmented Reality applications João Marcelo X. N. Teixeira, Veronica Teichrieb and Judith Kelner Virtual Reality and Multimedia Research Group Computer Science Center, Federal

Source URL: www.matmidia.mat.puc-rio.br

• Parallel computing
• GPGPU
• Graphics hardware
• OpenCL compute devices
• Fabless semiconductor companies
• Field-programmable gate array
• General-purpose computing on graphics processing units
• Compute kernel
• Connected-component labeling
• Graphics processing unit
• Coprocessor
• Altera Quartus