Compiler

Results: 4119



#Item
691Compiler / Compiler construction / ARM architecture / NOP / GNU Compiler Collection / Register-transfer level / E1 / Algorithm / Software / Computing / Programming language implementation

Automatic Validation of Code-Improving Transformations on Low-Level Program Representations ∗ Robert van Engelen, David Whalley, and Xin Yuan Department of Computer Science, Florida State University, Tallahassee, FL 32

Add to Reading List

Source URL: www.cs.fsu.edu

Language: English - Date: 2004-03-02 08:35:51
692Compiler optimizations / Polytope model / Induction variable

Polly Polyhedral Transformations for LLVM Tobias Grosser - Hongbin Zheng November 4, 2010

Add to Reading List

Source URL: www.llvm.org

Language: English - Date: 2010-11-17 16:19:20
693Compiler optimizations / Inline expansion / Inline function / Interprocedural optimization / Whole program optimization / Subroutine / Single Compilation Unit / Objective-C / Pin / Computing / Computer programming / Software engineering

The GCC call graph module a framework for inter-procedural optimization Jan Hubiˇcka ˇ SUSE CR

Add to Reading List

Source URL: gcc.cybermirror.org

Language: English - Date: 2004-08-29 18:00:00
694Compiler construction / Compiler optimizations / Subroutines / LLVM / GNU Compiler Collection / Compiler / Static single assignment form / Chris Lattner / Interprocedural optimization / Software / Programming language implementation / Compilers

Architecture for a Next-Generation GCC Chris Lattner Vikram Adve University of Illinois at Urbana, Champaign {lattner, vadve}@cs.uiuc.edu http://llvm.cs.uiuc.edu

Add to Reading List

Source URL: gcc.cybermirror.org

Language: English - Date: 2004-08-29 18:00:00
695Central processing unit / Memory management / Computer memory / CPU cache / Cache / Compiler optimization / Garbage collection / Microarchitecture / Cell / Computer architecture / Computer hardware / Computing

Profiling R on a Contemporary Processor Shriram Sridharan Jignesh M. Patel University of Wisconsin–Madison

Add to Reading List

Source URL: quickstep.cs.wisc.edu

Language: English - Date: 2014-09-06 08:35:45
696Branch predictor / Branch misprediction / Assembly languages / Instruction set / Branch predication / Compiler optimization / ARM architecture / Processor register / Classic RISC pipeline / Computer architecture / Central processing unit / Instruction set architectures

Reducing the Cost of Conditional Transfers of Control by Using Comparison Specifications William Kreahling Western Carolina University

Add to Reading List

Source URL: www.cs.fsu.edu

Language: English - Date: 2006-04-21 21:30:19
697Software / Application programming interfaces / Profilers / Compiler optimizations / Fortran / OpenMP / VTune / Multi-core processor / Coprocessor / Computing / Computer programming / Parallel computing

Programming and Optimization with Intel Xeon Phi Coprocessors Colfax Developer Training Four-day Workshop CDT 401

Add to Reading List

Source URL: www.colfax-intl.com

Language: English - Date: 2015-06-01 03:04:00
698Compiler optimizations / Register allocation / Compiler construction / Graph coloring / Static single assignment form / Connectivity / GNU Compiler Collection / Software / Programming language implementation / Computing

Design and Implementation of a Graph Coloring Register Allocator for GCC Michael Matz SuSE Linux AG

Add to Reading List

Source URL: gcc.cybermirror.org

Language: English - Date: 2004-08-29 18:00:00
699Compiler construction / Computing / Parsing / Automata theory / Models of computation / LR parser / Formal grammar / Parsing table / Compiler-compiler / Formal languages / Programming language implementation / Software engineering

Delft University of Technology Software Engineering Research Group Technical Report Series Parse Table Composition Separate Compilation and Binary

Add to Reading List

Source URL: swerl.tudelft.nl

Language: English - Date: 2008-12-30 16:24:40
700Central processing unit / Compiler optimizations / Classes of computers / Instruction set architectures / Software pipelining / Instruction pipeline / Reduced instruction set computing / MIPS architecture / Microarchitecture / Computer architecture / Computing / Computer engineering

Improving Low Power Processor Efficiency with Static Pipelining Ian Finlayson† , Gang-Ryung Uh‡ , David Whalley† and Gary Tyson† † ‡

Add to Reading List

Source URL: www.cs.fsu.edu

Language: English - Date: 2011-01-31 11:18:06
UPDATE