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181	Datasheet YieldManager Customizable Yield Management for IC Manufacturers Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:34:46 Science Wafer testing Wafer Synopsys Statistics Semiconductor device fabrication Information Data
182	Datasheet Liberty NCX The Fastest Path to Production Current-Source Libraries Overview At process technologies of 65 nanometers and below, designers face a plethora of new Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:38 Electronic design automation Standard cell SPICE Current source Electronic engineering Electromagnetism Software
183	Datasheet Synphony C Compiler High-Level Synthesis from C/C++ to RTL Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:31:02 High-level synthesis Logic synthesis SystemVerilog Synopsys Verilog Clock gating Field-programmable gate array Catapult C Compiler Electronic engineering Electronic design automation Hardware description languages
184	Datasheet DFTMAX Ultra Compression for Highest Test Quality and Lowest Test Cost Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:25 Integrated circuits Electronic design Software testing Automatic test pattern generation Scan chain Code coverage Automatic test equipment Fault coverage Electronic engineering Electronics Electronic design automation
185	Synopsys Common Licensing Release Notes Version 11.6 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-25 17:15:42 SUSE Linux SUSE Linux Enterprise Server X86-64 Solaris Linux Novell Open Enterprise Server Software Computing Computer architecture
186	Datasheet DC Explorer Early RTL Exploration Accelerates Design Schedules Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 14:15:50 Design closure Register-transfer level Design flow Clock gating Integrated circuit design Electronic engineering Electronic design automation Physical design
187	Success Story ZeBu Success Story CSR Image Processing With ZeBu we achieved a win-win situation: not just faster time-to‑market Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:38:04 ARM architecture Acorn Computers Instruction set architectures Electronics manufacturing Joint Test Action Group System on a chip Synopsys Field-programmable gate array Embedded system Electronic engineering Computer architecture Electronics
188	Datasheet DC Ultra Concurrent Timing, Area, Power and Test Optimization Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-03-19 18:15:41 Logic synthesis Physical design High-level synthesis Register-transfer level Placement Quality of results Multi-core processor Synopsys Retiming Electronic engineering Electronic design automation Electronics
189	Synopsys Common LIcensing Release Notes Version 11.7 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-25 17:15:42 X86-64 Solaris Linux 64-bit Computer architecture Comparison of platform virtual machines Computing Software X86 architecture
190	Synopsys Professional Services Datasheet Tool and Methodology Consulting At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:40:16 Signoff SystemVerilog Power optimization EDA database Timing closure Electronic engineering Electronic design automation Synopsys

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