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#	Item
1	Characterizing and Improving the Performance of Bioinformatics Workloads on the POWER5 Architecture Vipin Sachdeva, Evan Speight, Mark Stephenson Lei Chen Add to Reading List Source URL: www.bioperf.org Language: English - Date: 2008-05-05 11:06:10
2	OPTIMIZATION AND PERFORMANCE MODELING OF STENCIL COMPUTATIONS ON MODERN MICROPROCESSORS‡ KAUSHIK DATTA†, SHOAIB KAMIL∗†, SAMUEL WILLIAMS∗†, LEONID OLIKER∗, JOHN SHALF∗, KATHERINE YELICK∗† Abstract. St Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-09-06 23:58:43 Computer architecture Cache Central processing unit Microprocessors Computer memory CPU cache Stencil code Loop nest optimization Opteron POWER5 Cell Multi-core processor
3	NCAR Computation and Information Systems Laboratory Facilities and Support Overview UCAR Postdoctoral and Graduate Fellows March 16, 2007 Add to Reading List Source URL: www.asp.ucar.edu Language: English - Date: 2007-08-16 16:10:40 IBM System p IBM System i Computer cluster POWER5 IBM POWER Opteron IBM System Cluster Computing Server hardware Computer architecture
4	ocspumsum16chard.prn.pdf Add to Reading List Source URL: www.irisa.fr Language: English - Date: 2004-06-16 03:23:23 Server hardware Power Architecture IBM System p IBM AIX IBM eServer Symmetric multiprocessing POWER5 64-bit POWER6 Computer architecture Computing IBM
5	FlexRAM: Toward an Advanced Intelligent Memory System A Retrospective Paper Josep Torrellas Department of Computer Science University of Illinois [removed] Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2012-09-12 16:09:20 Computing Computer engineering The Berkeley IRAM Project Dynamic random-access memory Processor-in-memory POWER5 Memory controller Micron Technology Josep Torrellas Computer memory Computer hardware Computer architecture
6	POWER7+TM IBM © 2012 IBM Corporation Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:26:56 POWER7 Microprocessors POWER6 CPU cache POWER5 Multi-core processor POWER4 Computer hardware Computer architecture Computing
7	Systems Technology Group and Research Division Power-Performance Comparative Evaluation of Alternate Microarchitectures Rick Eickemeyer, Michael Floyd, John Griswell, Alex Mericas, Balaram Sinharoy Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-28 00:05:04 Parallel computing POWER5 Power Architecture POWER4 IBM System p POWER6 Multi-core processor POWER3 Blue Gene Computing Computer architecture IBM
8	Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-27 11:37:33 Speculative multithreading Josep Torrellas Speedup Central processing unit POWER5 Computing Parallel computing Standard Performance Evaluation Corporation
9	Reduce complexity and optimize flexibility with the world’s first POWER5-based server IBM ^ i5 520 Advanced virtualization technologies Add to Reading List Source URL: www.cygnusapp.com Language: English - Date: 2013-02-28 10:17:35 Software Server hardware Power Architecture IBM System i Java enterprise platform IBM DB2 IBM AIX Logical partition IBM i Computer architecture Computing AS/400
10	HC19Fault – Tolerant Design of the IBM POWER6 Microprocessor.v6.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:58:01 POWER6 Chipkill CPU cache IBM POWER POWER5 Dynamic random-access memory Multi-core processor RAM parity IBM z10 Computer memory Computer hardware Computing

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