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#	Item
511	Datasheet Sentaurus TCAD Industry-Standard Process and Device Simulators Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:35:54
512	Synopsys TCAD Services datasheet Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:36:03 Technology CAD Infrastructure optimization Simulation Process engineering Semiconductor device modeling Electronic design automation Electronic engineering Synopsys
513	Synopsys Professional Services Datasheet Design Flow Deployment At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:43 Integrated circuits Electronic design Digital electronics Synopsys Timing closure Integrated circuit design Design flow Signoff EDA database Electronic engineering Electronics Electronic design automation
514	A Power-Centric Timing Optimization Flow for a Quad-Core ARM Cortex-A7 Processor Bernard Ortiz de Montellano Product Manager Processor Division Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:16 Computing ARM Cortex-A15 MPCore Multi-core processor Tegra CPU cache A15 Computer architecture ARM architecture Computer hardware
515	Datasheet FineSim Multi-Core/Multi-Machine Enabled Full-Chip Circuit-Level Simulation Introduction Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 14:15:51 Electronic circuit simulation SPICE Field-programmable gate array Multi-core processor Logic simulation Synopsys Simucad Electronic engineering Digital electronics Electronic design automation
516	Datasheet QuickCap NX 3D Field Solver Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:38 Electronics Parasitic extraction NX Synopsys Multigate device Parasitic capacitance Netlist Capacitance Simucad Electronic engineering Electronic design automation Electromagnetism
517	Success Story Synopsys and Yokogawa Yokogawa Achieves Industry’s Fastest Programmable Logic Controller Performance with Processor Designer Add to Reading List Source URL: www.synopsys.com Language: English Parallel computing Hillsboro Oregon Synopsys LISA Programmable logic controller Very long instruction word Yokogawa Electric Technology Electronics Computing
518	Synopsys Professional Services Datasheet Tool and Methodology Consulting At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:40:16 Signoff SystemVerilog Power optimization EDA database Timing closure Electronic engineering Electronic design automation Synopsys
519	Layering Protocol Verification: A Pragmatic Approach Using UVM Rahul Chauhan ([removed]) Gurpreet Kaire ([removed]) Broadcom, Inc. San Diego, CA - USA www.broadcom.com Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:16 OSI protocols Network architecture Communications protocol Data transmission Protocols Internet standards OSI model Link layer Transmission Control Protocol Computing Data Information
520	Microsoft Word - vals.doc Add to Reading List Source URL: www.synopsys.com Language: English FlexRay Network topology Physical layer Topology Computer network Channel Star network CAN bus INCA Electronics Computing Technology

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