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Microprocessors
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#	Item
561	1 Three Generations of Asynchronous Microprocessors Alain J. Martin, Mika Nystr¨om, Catherine G. Wong Department of Computer Science Add to Reading List Source URL: www.async.caltech.edu Language: English - Date: 2003-08-13 19:45:22 Electrical circuits Instruction set architectures MIPS architecture Asynchronous circuit R4000 Quasi Delay Insensitive R4600 Alpha 21064 Central processing unit Computer architecture Electronic engineering Computer hardware
562	Demographic and Technological Change James W. Hughes, Dean 2013 Obsolete Industrial Plant Add to Reading List Source URL: www.njslom.org Language: English - Date: 2013-11-12 20:36:04 Telecommunications engineering IBM Personal Computer XT Electronics Computing Electronic engineering Microcomputers Microprocessors
563	An Oracle White Paper December 2012 Hard Partitioning With Oracle VM Server for SPARC Add to Reading List Source URL: www.oracle.com Language: English Logical Domains Multi-core processor Oracle Database Central processing unit Software Computing Microprocessors
564	White Paper DFTMAX Compression Shared I/O Minimize the Cost of Testing ARM® Processor-based Designs and Other Multicore SoCs July 2013 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-19 16:15:31 ARM architecture Microprocessors Automatic test pattern generation Multi-core processor Scan chain ARM Cortex-A15 MPCore Tegra Embedded system Central processing unit Electronic engineering Computer architecture Electronics
565	Q-Machine: A Spatially-Aware Decentralized Computer Architecture Proposal for Research in Partial Fulfillment of the Requirements for a Doctorate of Philosophy in Electrical Engineering and Computer Science at the Add to Reading List Source URL: www.ai.mit.edu Language: English - Date: 2001-05-14 13:41:26 Computing Microprocessors CPU cache Cache Computer memory Multi-core processor Athlon Parallel computing Itanium Computer hardware Computer architecture Central processing unit
566	Spatially Aware Decentralized Computing Andrew “bunnie”Huang, Ben Vandiver, Jeremy Brown, J.P. Grossman and Tom Knight Introduction 55 Add to Reading List Source URL: www.ai.mit.edu Language: English - Date: 2001-08-04 10:16:25 Central processing unit Microprocessors CPU cache Cache Computer memory Scheduling Microarchitecture Thread Parallel computing Computing Computer architecture Computer hardware
567	--07 May 22, 2000 Proposed Model for Multithreading and Event Handling in the Aries Architecture Add to Reading List Source URL: www.ai.mit.edu Language: English - Date: 2001-05-16 17:41:21 Central processing unit Threads Concurrent computing Microprocessors Multithreading Parallel computing Context switch CPU cache Event Computing Computer architecture Computer hardware
568	Corporate Environmental Affairs Nanotechnology as a Tool to Advance Pollution Prevention in the Semiconductor/IT Industry Airgap Microprocessors: Directed Self-Assembly Add to Reading List Source URL: www.epa.gov Language: English - Date: 2010-01-21 16:31:58 Microelectromechanical systems Nanoelectronics IBM United States Environmental Protection Agency Impact of nanotechnology Outline of nanotechnology Technology Nanotechnology Materials science
569	--12 February 12, 2001 Hamal Design Rationale J.P. Grossman Add to Reading List Source URL: www.ai.mit.edu Language: English - Date: 2001-05-16 17:41:23 Central processing unit Parallel computing Supercomputers Microprocessors Very long instruction word Instruction set Superscalar 64-bit Processor register Computer architecture Computing Computer hardware
570	A Software Approach to Unifying Multicore Caches Silas Boyd-Wickizer, M. Frans Kaashoek, Robert Morris, and Nickolai Zeldovich Abstract This paper explores the opportunity for better management of Add to Reading List Source URL: people.csail.mit.edu Language: English Computer memory Cache Computer engineering Central processing unit Computer architecture CPU cache Multi-core processor TILE64 Parallel computing Computer hardware Microprocessors Computing

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