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Microprocessors
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#	Item
301	FlexSC: Flexible System Call Scheduling with Exception-Less System Calls Livio Soares University of Toronto Michael Stumm University of Toronto Add to Reading List Source URL: www.cs.cmu.edu Language: English - Date: 2011-03-31 12:55:55 Parallel computing Threads X86 architecture Central processing unit Microprocessors Ring System call Mach X86-64 Computing Computer architecture Concurrent computing
302	Microsoft PowerPoint - Arch1 Add to Reading List Source URL: www.ee.ic.ac.uk Language: English - Date: 2001-10-07 11:04:58 Central processing unit Microprocessors Digital electronics Microarchitecture Instruction set Computer Empire Earth II Intel 80386 Computer hardware Computer architecture Computing
303	The HP PA-8000 RISC CPU A High Performance Out-of-Order Processor Ashok Kumar Hot Chips VIII Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:47:33 Central processing unit Instruction set architectures PA-8000 Microprocessors PA-RISC Reduced instruction set computing CPU cache Microarchitecture Runway bus Computer architecture Computer hardware Computing
304	A PowerPC compatible ® processor supporting highperformance 3-D graphics PETER SANDON Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:39:03 Instruction set architectures Computer memory CPU cache Cache Central processing unit Gekko Embedded microprocessors Vortex86 R8000 Computer hardware Computer architecture Computing
305	Microsoft PowerPoint - Hotchips99 Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:49:49 Central processing unit Parallel computing Classes of computers Microprocessors Very long instruction word Sun Microsystems Microarchitecture MAJC Instruction set Computer architecture Computing Computer hardware
306	J-Link / J-Trace User Guide (UM08001) Add to Reading List Source URL: www.segger.com Language: English - Date: 2015-04-10 14:53:41 Microcontrollers ARM architecture Embedded systems Embedded microprocessors Segger Microcontroller Systems IEEE standards Joint Test Action Group STM32 EFM32 Computer architecture Electronics Electronic engineering
307	M7: Next Generation SPARC Hotchips 26 – August 12, 2014 Stephen Phillips Senior Director, SPARC Architecture Oracle Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2014-08-02 15:16:00 SPARC T3 Nehalem Intel Core CPU cache Microprocessors Montecito UltraSPARC T1 Computer hardware Oracle Corporation SPARC T4
308	Transmeta’s Crusoe: Cool Chips for Mobile Computing David R. Ditzel Chief Executive Officer Transmeta Corporation Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:38:01 Computer engineering Parallel computing Transmeta Instruction set architectures X86 Code morphing Very long instruction word Code Morphing Software Central processing unit Computing Computer architecture Embedded microprocessors
309	HC17.S2T1 A Milliflow Aggregation Processor.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:45:43 Computer memory Direct memory access Motherboard Instruction set architectures Microcontrollers 64-bit Embedded microprocessors Blackfin Forwarding plane Computer hardware Computer architecture Computing
310	Gemini: A Power-efficient Chip Multi-Threaded (CMT) UltraSPARC® Processor Sanjiv Kapil Gemini Architect Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:42:23 Microprocessors UltraSPARC III UltraSPARC II Instruction set architectures UltraSPARC T1 UltraSPARC IV SPARC Multi-core processor DIMM Computer hardware Computer architecture Central processing unit

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