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161	Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitris Tsaliagkos, Manolis Katevenis, Dionisios Pnevmatikatos a Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 Computer memory Field-programmable gate array MicroBlaze Xilinx CPU cache Multi-core processor Dynamic random-access memory Joint Test Action Group NetFPGA Computer hardware Computing Electronic engineering
162	Press Release Place de l’Université, 16, 1348 Louvain-la-Neuve, Belgium Telephone: +31 August 2007 For immediate release Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-11-14 11:14:44 Electronic engineering Electronics Reconfigurable computing Digital media Xilinx JPEG Field-programmable gate array Digital Cinema Initiatives Codec ISO standards Computing Graphics file formats
163	Appears in Proceedings: 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines – FCCM 2007, IEEE, pp. 287–288, ISBN, ISBNNew Protection Mechanisms for Intel Add to Reading List Source URL: www.bmoeller.de Language: English - Date: 2007-09-28 08:15:05 Fabless semiconductor companies Computing Field-programmable gate array Xilinx Altera Bitstream Joint Test Action Group SiliconBlue Technologies Nios II Electronic engineering Reconfigurable computing Electronics
164	Press Release Place de l’Université, 16, 1348 Louvain-la-Neuve, Belgium Telephone: + March 2007 Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-03-09 09:21:22 Fabless semiconductor companies Electronic engineering Reconfigurable computing Electronics Xilinx JPEG Louvain Field-programmable gate array Graphics file formats ISO standards Computing
165	Review of stream cipher candidates from a low resource hardware perspective T. Good, W. Chelton and M. Benaissa Department of Electrical & Electronic Engineering, University of Sheffield, Mappin Street, Sheffield, S1 3JD Add to Reading List Source URL: www.ecrypt.eu.org Language: English - Date: 2006-02-13 07:41:31 ESTREAM VEST Trivium Field-programmable gate array SFINKS Grain Achterbahn MICKEY Xilinx Stream ciphers Cryptography Phelix
166	Appears in Proceedings: IEEE International Conference on Field-Programmable Technology – ICFPT 2007, IEEE, pp. 169–176, ISBN7, 2008. Dynamic Intellectual Property Protection for Reconfigurable Device Add to Reading List Source URL: www.bmoeller.de Language: English - Date: 2008-06-04 18:22:14 Field-programmable gate array Xilinx Symmetric-key algorithm Key Public-key cryptography Block cipher Brute-force attack Partial re-configuration Cryptography Key management Reconfigurable computing
167	How Different Electrical Circuits of ECC Designs Influence the Shape of Power Traces measured on FPGA Thomas Basmer, Christian Wittke, Zoya Dyka, and Peter Langendoerfer System dept., IHP, Im Technologiepark 25, Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2014-12-19 03:59:09 Fabless semiconductor companies Reconfigurable computing Xilinx Field-programmable gate array Elliptic curve cryptography Power analysis Multiplication algorithm Multiplication Side channel attack Electronic engineering Mathematics Electronics
168	Enhancing Trust in Reconfigurable Based Hardware Systems with Tags and Monitors Devu Manikantan Shila, Vivek Venugopalan Cameron D Patterson Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2015-05-07 22:23:51 Fabless semiconductor companies Reconfigurable computing Field-programmable gate array Xilinx Semiconductor intellectual property core Embedded system Altera Application-specific integrated circuit Hardware Trojan Electronic engineering Electronics Digital electronics
169	C:/Documents and Settings/BrianB/Desktop/Notes/work/HASH-Sha3/round 2/FPGA_examination/FPGA analysis - wout code/FPGAAnalysis.dvi Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2009-12-07 08:44:55 Field-programmable gate array Digital electronics Reconfigurable computing Xilinx Integrated circuits Electronic design automation Altera Logic synthesis Application-specific integrated circuit Electronic engineering Electronics Fabless semiconductor companies
170	A Comparative Analysis of Delay Based PUF Implementations on FPGA Sergey Morozov, Abhranil Maiti, Patrick Schaumont, Virginia Polytechnic Institute and State University {morozovs, abhranil, schaum}@vt.edu Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2009-12-19 15:05:40 Integrated circuits Digital electronics Physical Unclonable Function Randomness Field-programmable gate array Placement Place and route Xilinx Routing Electronic engineering Electronics Electronic design automation

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