Nios II

Results: 101



#Item
1eSi-3200 – 32-bit, low-cost & low-power CPU EnSilica’s eSi-3200 CPU IP core is an extremely small, low-cost and low-power processor ideal for integration into ASIC and/or FPGA designs with on-chip memories. The eSi-3

eSi-3200 – 32-bit, low-cost & low-power CPU EnSilica’s eSi-3200 CPU IP core is an extremely small, low-cost and low-power processor ideal for integration into ASIC and/or FPGA designs with on-chip memories. The eSi-3

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Source URL: www.avant-tek.com

Language: English - Date: 2014-10-14 01:56:26
2eSi-3250 – 32-bit, high-performance CPU EnSilica’s eSi-3250 CPU IP core is a high-performance processor ideal for integration into ASIC and/or FPGA designs with off-chip memories. The eSi-3250 is suited to a wide ran

eSi-3250 – 32-bit, high-performance CPU EnSilica’s eSi-3250 CPU IP core is a high-performance processor ideal for integration into ASIC and/or FPGA designs with off-chip memories. The eSi-3250 is suited to a wide ran

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Source URL: www.avant-tek.com

Language: English - Date: 2014-10-14 01:56:26
3Topics of interest include, but are not limited to: 1. Internet of Things 1.1 Application Profiles 1.2 Embedded Cloud Computing

Topics of interest include, but are not limited to: 1. Internet of Things 1.1 Application Profiles 1.2 Embedded Cloud Computing

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Source URL: www.embedded-world.eu

Language: English - Date: 2015-05-22 05:20:14
4Technology of Rapid Data Transfers for Embedded Devices Project results The main result of the cooperation of the

Technology of Rapid Data Transfers for Embedded Devices Project results The main result of the cooperation of the

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Source URL: www.spolupraceroku.cz

Language: English - Date: 2014-12-08 06:02:30
5Microsoft Word - DKAN0011A.doc

Microsoft Word - DKAN0011A.doc

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Source URL: www.digikey.com

Language: English - Date: 2011-01-11 11:24:04
6Microsoft Word - DKAN0010A.doc

Microsoft Word - DKAN0010A.doc

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Source URL: www.digikey.com

Language: English - Date: 2011-01-11 11:24:03
7Danville Signal Processing, Inc.  dspblok™ 21369+fpga CORE PS  FLASH

Danville Signal Processing, Inc. dspblok™ 21369+fpga CORE PS FLASH

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Source URL: www.danvillesignal.com

Language: English - Date: 2010-09-02 08:04:18
8Appears in Proceedings: 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines – FCCM 2007, IEEE, pp. 287–288, ISBN, ISBNNew Protection Mechanisms for Intel

Appears in Proceedings: 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines – FCCM 2007, IEEE, pp. 287–288, ISBN, ISBNNew Protection Mechanisms for Intel

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Source URL: www.bmoeller.de

Language: English - Date: 2007-09-28 08:15:05
9Product Announcement  FreeRTOS V6.0.0 includes integrated memory protection (MPU) support for Cortex-M3 MCUs  October 2009

Product Announcement FreeRTOS V6.0.0 includes integrated memory protection (MPU) support for Cortex-M3 MCUs October 2009

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Source URL: www.freertos.org

Language: English - Date: 2009-10-16 10:53:29
10FPGA Design of a Camera Control System for Road Traffic Monitoring George K. Adam, Georgia Garani, Dimitrios Ventzas Computer Science and Engineering Technological Educational Institute of Thessaly, Larissa, Greece

FPGA Design of a Camera Control System for Road Traffic Monitoring George K. Adam, Georgia Garani, Dimitrios Ventzas Computer Science and Engineering Technological Educational Institute of Thessaly, Larissa, Greece

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Source URL: www.teilar.gr

Language: English