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VHDL
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#	Item
201	Microsoft PowerPoint - auspy-datasheet-x.ppt Add to Reading List Source URL: www.auspy.com Language: English - Date: 2014-04-03 13:05:24 Field-programmable gate array Reconfigurable computing Xilinx VHDL Verilog Compiler Electronic engineering Electronic design automation Hardware description languages
202	http://www.kip.uni-heidelberg.de/wiki/GraKo-VHDL-Einfuehrungsku Add to Reading List Source URL: www.mn.uio.no Language: English Hardware description languages VHDL Field-programmable gate array
203	Employment Oriented Summer Course[removed]APEX Institute of Technology and Management Pahala, Bhubaneswar, Orissa. Ph: [removed], website: www.apexorissa.com SUMMER COURSE Add to Reading List Source URL: www.apexorissa.com Language: English - Date: 2012-06-15 22:35:44 Electronic design Digital electronics Integrated circuits Xilinx Verilog Field-programmable gate array Logic synthesis VHDL Application-specific integrated circuit Electronic engineering Electronics Hardware description languages
204	Microsoft Word - FPGA Applications using HDL Programming and Model based Design Add to Reading List Source URL: www.vit.ac.in Language: English - Date: 2014-04-17 03:21:19 Verilog Field-programmable gate array Xilinx ISE Simulink Flow to HDL Verilog-AMS Hardware description languages Electronic engineering VHDL
205	Print Zuken Datasheet Template Add to Reading List Source URL: www.quadrasol.co.uk Language: English - Date: 2011-05-12 04:19:55 Logic design Hardware description languages Field-programmable gate array CADSTAR Electronic design VHDL Place and route Verilog Logic synthesis Electronic engineering Digital electronics Electronic design automation
206	SystemVerilog, VHDL, Verilog och FPGA-kurser Sverige och ”Medelhavet” Add to Reading List Source URL: www.realfast.se Language: Swedish - Date: 2012-01-14 05:29:09
207	PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip ∗† Matthieu Moy [removed] Add to Reading List Source URL: www-verimag.imag.fr Language: English - Date: 2005-09-08 19:36:32 Logic design Electronic design automation SystemC Transaction-level modeling NCSim CPU design E Verilog VHDL Electronic engineering Hardware description languages Hardware verification languages
208	Designing, Verifying and Building an Advanced L2 Cache Sub-‐System using SystemC Designing, Verifying and Building an Advanced L2 Cache S Add to Reading List Source URL: events.dvcon.org Language: English - Date: 2012-02-07 19:56:23 Hardware verification languages SystemC E VHDL High-level synthesis CPU cache Forte Design Systems System on a chip Field-programmable gate array Electronic engineering Electronic design automation Hardware description languages
209	sutherland-hdl_workshops.fm Add to Reading List Source URL: www.sutherland-hdl.com Language: English - Date: 2012-11-02 18:47:30 Hardware verification languages SystemVerilog E Verilog Universal Verification Methodology Open Verification Methodology VHDL Intelligent verification Electronic engineering Electronic design automation Hardware description languages
210	CCM1 Generic CCM AES Cores Add to Reading List Source URL: www.ipcores.com Language: English - Date: 2012-03-19 22:58:28 Block cipher modes of operation CCM mode Data Encryption Standard Verilog VHDL Message authentication codes Cryptography Hardware description languages Advanced Encryption Standard

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