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1	By Donna Mitchell and Dan Notestein Easing Today’s Verification Language Bedlam Creating SystemC and HDL testbenches with SCV ? Add to Reading List Source URL: www.syncad.com Language: English - Date: 2016-09-28 16:13:39
2	SYSTEMC OPEN SOURCE LICENSE Add to Reading List Source URL: accellera.org Language: English - Date: 2015-03-27 17:59:23
3	OpTiMSoC User Guide June 7, 2016 Document Changes Add to Reading List Source URL: www.optimsoc.org Language: English - Date: 2016-06-07 08:44:38 Software Embedded microprocessors OpenRISC SystemC Package manager Field-programmable gate array Verilator Git Linux distribution Nullsoft Scriptable Install System Installation
4	An Environment for Dynamic Component Composition for Efficient Co-Design Add to Reading List Source URL: mesl.ucsd.edu Language: English - Date: 2009-06-15 02:26:14 Electronic engineering Electronic design automation Digital electronics SystemC Electronic system-level design and verification Embedded system Composability Transaction-level modeling VisualSim Architect
5	Functional Design using Behavioural and Structural Components Richard Sharp University of Cambridge Computer Laboratory William Gates Building JJ Thomson Avenue Add to Reading List Source URL: rich.recoil.org Language: English - Date: 2006-04-13 14:58:00 Electronic engineering Digital electronics Electronic design automation Hardware description languages Electronics Logic synthesis Verilog High-level synthesis VHDL SystemC Adder Silicon compiler
6	Avant Technology Partners With NEC To Market High-Level Synthesis In Asia September 5, Avant Technology announced today they have partnered with NEC Corporation (NEC; TSE: 6701) to bring the award-winning C and S Add to Reading List Source URL: www.avant-tek.com Language: English - Date: 2014-07-31 22:33:50 Electronic engineering Electronics Business Electronic design SystemC High-level synthesis NEC Electronic design automation Mentor Graphics System on a chip Integrated circuit design
7	Avant Technology Partners With NEC To Market High-Level Synthesis In Asia September 5, Avant Technology announced today they have partnered with NEC Corporation (NEC; TSE: 6701) to bring the award-winning C and S Add to Reading List Source URL: www.avant-tek.com Language: English - Date: 2014-07-31 22:33:50 Electronic engineering Electronic design SystemC High-level synthesis NEC Electronic design automation Mentor Graphics System on a chip Integrated circuit design
8	HATS Abstract Behavioral Specification: The Architectural View? Reiner Hähnle1 , Michiel Helvensteijn2 , Einar Broch Johnsen3 , Michael Lienhardt4 , Davide Sangiorgi4 , Ina Schaefer5 , and Peter Y. H. Wong6 1 Add to Reading List Source URL: www.mhelvens.net Language: English - Date: 2012-09-26 08:01:20 Feature-oriented programming Feature model SystemC R Business process modeling Modeling language Delta Workflow Prototype
9	A short guide to design tools and design methodology support services for academic institutes and publicly funded research laboratories throughout Europe 2016 EDITION Add to Reading List Source URL: www.europractice.stfc.ac.uk Language: English - Date: 2016-02-26 14:00:14 Electronic engineering Digital electronics Electronics Electronic design automation High-level synthesis SystemC Signoff Physical design Integrated circuit design Synopsys VHDL Verilog
10	Verilator: Open Simulation - Growing Up http://www.veripool.org/papers Wilson Snyder Cavium Networks Add to Reading List Source URL: www.veripool.org Language: English - Date: 2013-06-06 20:23:28 Electronic design automation Electronic engineering Digital electronics Hardware description languages Logic design Verilator SystemC Verilog Simulation Logic simulation

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