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#	Item
561	Datasheet Galaxy Custom Designer LE Custom Layout Editing Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:29:15 Electronic design automation Design rule checking Process design kit Application-specific integrated circuit Integrated circuit design Signoff Electronic engineering Electronics Integrated circuits
562	Datasheet Certitude Functional Qualification System Overview Add to Reading List Source URL: www.synopsys.com Language: English Electronic design automation Systems engineering Logic in computer science Hardware verification languages Verification Functional verification Formal verification E Logic simulation Electronic engineering Digital electronics Formal methods
563	Datasheet PCell Xtreme Persistent PCells for OpenAccess Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:29:16 Cell Electronics OpenAccess Cadence SKILL Cache Interoperable PDK Libraries Electronic engineering PCell Electronic design automation
564	Datasheet Galaxy Custom Router Analog and Special Net Routing for Custom and Digital IC Design Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:29:15 Differential pair Router Digital electronics Nanoroute Electronic engineering Electronic design automation Routing
565	Datasheet PrimeRail In-Design Rail Analysis for Place-and-Route Engineers Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:38 Electronic design Logic families Signoff Power gating Power network design Synopsys Design closure CMOS Electronic circuit simulation Electronic engineering Electronic design automation Digital electronics
566	Datasheet SiliconSmart Comprehensive Cell, I/O and Memory Characterization Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:38 Standard cell Signoff SPICE Verilog Electronic circuit simulation Synopsys Signal integrity Simucad Electronic engineering Electronic design automation Digital electronics
567	Datasheet VCS Functional Verification Choice of Leading SoC Design Teams Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:41:22 Hardware description languages SystemVerilog OpenVera E Functional verification Synopsys Open Verification Methodology Verilog Logic simulation Electronic engineering Electronic design automation Hardware verification languages
568	Datasheet Siloti Visibility Automation System Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-01-20 19:15:21 Logic design Post-silicon validation Logic simulation Synopsys Electronic design Hardware emulation Electronic engineering Digital electronics Electronic design automation
569	Datasheet DFTMAX High Quality, Low Cost Test Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-03-20 14:15:36 Electronics manufacturing Electronic design Integrated circuits Automatic test pattern generation Test compression Scan chain Joint Test Action Group Boundary scan Physical design Electronic engineering Electronics Electronic design automation
570	Datasheet NanoTime Transistor-level Static Timing Analysis Solution for Custom Designs Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-27 00:06:11 Signoff Synopsys Static timing analysis Signal integrity Electronic circuit simulation Delay calculation Logic simulation Parasitic extraction SPICE Electronic engineering Electronic design automation Digital electronics

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