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Power gating
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1	Power Reduction Through RTL Clock Gating By Frank Emnett and Mark Biegel Automotive Integrated Electronics Corporation Add to Reading List Source URL: www.eng.auburn.edu - Date: 2007-12-06 17:00:33
2	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 22, NO. 4, APRILDesign Flow for Flip-Flop Grouping in Data-Driven Clock Gating Add to Reading List Source URL: euler.ecs.umass.edu Language: English - Date: 2014-03-31 16:24:12 Digital electronics Electronic engineering Electronic design automation Electrical engineering Clock signal Digital systems Clock gating Energy conservation Gating Clock Flip-flop Power optimization
3	#010 Gating device utilizing fluid pressure type engine Disaster prevention device that does not need a power • • • Add to Reading List Source URL: www.nissuicon-nbp.co.jp - Date: 2015-05-26 20:47:00
4	Temperature-Aware GPU Design Jeremy W. Sheaffer, Kevin Skadron, and David P. Luebke University of Virginia Dept. of Computer Science {jws9c, skadron, luebke}@cs.virginia.edu The Need for Temperature-Aware Design Add to Reading List Source URL: qsilver.cs.virginia.edu Language: English - Date: 2004-08-23 12:32:16 Computing Energy conservation Dynamic voltage scaling Clock gating Thermal management of electronic devices and systems GeForce 4 Series Multi-core processor Central processing unit Low-power electronics Computer hardware Electronic engineering Clock signal
5	Energy Efficient Power Gating Architecture using NV-SRAM & NV-FF Associate Prof. Satoshi SUGAHARA (Tokyo Institute of Technology) 1. Abstract A new power-gating architecture using non-volatile SRAM (NV-SRAM) and non-vola Add to Reading List Source URL: www.jst.go.jp Language: English - Date: 2015-01-14 21:20:23 Technology Power gating MOSFET Dynamic random-access memory Random-access memory Transistor Inverter Static random-access memory Computer memory Electrical engineering Electronic engineering
6	Device Drivers Should Not Do Power Management Chao Xu, Felix Xiaozhu Lin, and Lin Zhong Rice University, Houston, TX Abstract We argue that device drivers are not the best place to implement power management policies for Add to Reading List Source URL: www.ruf.rice.edu Language: English - Date: 2014-06-05 16:33:07 Electronics Kernel Operating system I²C Personal computer hardware Power gating BIOS Microcontrollers Technical features new to Windows Vista Electronic engineering Computing Device driver
7	June 11, 2012 Tohoku University NEC Corporation Tohoku University Develops World’s First Fast Access Embedded Add to Reading List Source URL: www.csis.tohoku.ac.jp Language: English - Date: 2012-06-07 22:35:22 Electromagnetism Digital electronics Static random-access memory Random-access memory Very-large-scale integration Power gating Electronic circuit Integrated circuit Computer data storage Computer memory Electronic engineering Electronics
8	Datasheet PrimeRail In-Design Rail Analysis for Place-and-Route Engineers Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:38 Electronic design Logic families Signoff Power gating Power network design Synopsys Design closure CMOS Electronic circuit simulation Electronic engineering Electronic design automation Digital electronics
9	Datasheet Power Compiler Power Optimization in Design Compiler Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 14:15:51 Electromagnetism Digital electronics Power gating Clock gating Power optimization Power management Compiler Design flow Unified Power Format Electronic engineering Electronic design automation Electronics
10	TUTORIAL: APPLIED RESEARCH IN MAGNETISM Magnetic Tunnel Junction for Integrated Circuits: Scaling and Beyond Hideo Ohno1,2 Add to Reading List Source URL: www.csis.tohoku.ac.jp Language: English - Date: 2014-06-09 22:05:01 Digital electronics Electronic design automation Spintronics Tunnel magnetoresistance MOSFET Capacitor Leakage Power gating High-k dielectric Electrical engineering Electromagnetism Electronic engineering