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151	Advanced Training Lighting Design with LucidShape - Overview www.lucidshape.com www.luciddrive.com Add to Reading List Source URL: www.brandenburg-gmbh.de Language: English Recruit training Structure Technology Architecture Lighttools Headlamp Lighting Synopsys
152	PDF Document Add to Reading List Source URL: www.doulos.com Language: English - Date: 2013-08-22 08:49:29 VHDL Field-programmable gate array SystemC Verilog Synopsys Altera Xilinx Electronic engineering Electronic design automation Hardware description languages
153	Datasheet Galaxy Custom Router Analog and Special Net Routing for Custom and Digital IC Design Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:29:15 Differential pair Router Digital electronics Nanoroute Electronic engineering Electronic design automation Routing
154	Datasheet VCS Functional Verification Choice of Leading SoC Design Teams Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:41:22 Hardware description languages SystemVerilog OpenVera E Functional verification Synopsys Open Verification Methodology Verilog Logic simulation Electronic engineering Electronic design automation Hardware verification languages
155	Datasheet Galaxy Custom Designer Schematic-Driven Layout (SDL) Improving Designer Productivity for Layout Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 15:15:30
156	White Paper Test Automation of 3D Integrated Systems January 2012 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:41:47 Integrated circuits Semiconductor device fabrication Through-silicon via Software testing Electronic design Automatic test pattern generation Boundary scan Automatic test equipment Synopsys Electronic engineering Electronics Technology
157	Synopsys Professional Services Datasheet SoC Integration & Verification At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:40:10 Hillsboro Oregon Synopsys SystemVerilog Physical design Functional verification E OpenVera Virtual Socket Interface Alliance Electronic engineering Electronic design automation Hardware verification languages
158	Datasheet FineSim Multi-Core/Multi-Machine Enabled Full-Chip Circuit-Level Simulation Introduction Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-18 14:15:51 Electronic circuit simulation SPICE Field-programmable gate array Multi-core processor Logic simulation Synopsys Simucad Electronic engineering Digital electronics Electronic design automation
159	Synopsys Professional Services Datasheet Design Flow Deployment At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:43 Integrated circuits Electronic design Digital electronics Synopsys Timing closure Integrated circuit design Design flow Signoff EDA database Electronic engineering Electronics Electronic design automation
160	Datasheet Yield Explorer Design-centric yield management Identify and eliminate Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:34:57 Electronic design automation Hillsboro Oregon Synopsys Physical design Yield Automatic test pattern generation Test engineer Electronic engineering Mechanics Physics

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