Static random-access memory

Results: 89



#Item
1Ultra-low power FinFET based SRAM cell employing sharing current concept

Ultra-low power FinFET based SRAM cell employing sharing current concept

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Source URL: moimani.weebly.com

Language: English - Date: 2016-02-06 01:01:32
2SESSION IX: STATIC AND NONVOLATILE MEMORIES THAM 9.6: A 256-Bit Nonvolatile Static RAM Eli Harari, Lawrence Schmitz, Bruce Troutman and Samuel wang Hughes Aircraft Co.

SESSION IX: STATIC AND NONVOLATILE MEMORIES THAM 9.6: A 256-Bit Nonvolatile Static RAM Eli Harari, Lawrence Schmitz, Bruce Troutman and Samuel wang Hughes Aircraft Co.

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Source URL: ethw.org

Language: English - Date: 2012-03-02 14:05:54
3Chapter 6  The Memory Hierarchy To this point in our study of systems, we have relied on a simple model of a computer system as a CPU that executes instructions and a memory system that holds instructions and data for th

Chapter 6 The Memory Hierarchy To this point in our study of systems, we have relied on a simple model of a computer system as a CPU that executes instructions and a memory system that holds instructions and data for th

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Source URL: csapp.cs.cmu.edu

Language: English - Date: 2010-02-14 14:17:26
4NTE2114 Integrated Circuit MOS, Static 4K RAM, 300ns Description: The NTE2114 1024–word 4–bit static random access memory is fabricated using N–channel silicon– gate technology. All internal circuits are fully st

NTE2114 Integrated Circuit MOS, Static 4K RAM, 300ns Description: The NTE2114 1024–word 4–bit static random access memory is fabricated using N–channel silicon– gate technology. All internal circuits are fully st

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Source URL: www.downloads.reactivemicro.com

Language: English - Date: 2008-02-09 13:46:29
    5Workshop Four - Framestore for an LED Array Introduction This experiment is designed to show the operation of a framestore and introduce the use of a Static Random Access Memory (SRAM). The design uses the SRAM as a fram

    Workshop Four - Framestore for an LED Array Introduction This experiment is designed to show the operation of a framestore and introduce the use of a Static Random Access Memory (SRAM). The design uses the SRAM as a fram

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    Source URL: www.cl.cam.ac.uk

    Language: English - Date: 2011-09-14 13:41:31
      6Energy Efficient Power Gating Architecture using NV-SRAM & NV-FF Associate Prof. Satoshi SUGAHARA (Tokyo Institute of Technology) 1. Abstract A new power-gating architecture using non-volatile SRAM (NV-SRAM) and non-vola

      Energy Efficient Power Gating Architecture using NV-SRAM & NV-FF Associate Prof. Satoshi SUGAHARA (Tokyo Institute of Technology) 1. Abstract A new power-gating architecture using non-volatile SRAM (NV-SRAM) and non-vola

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      Source URL: www.jst.go.jp

      Language: English - Date: 2015-01-14 21:20:23
      7APPLICATION NOTE  7 THE Z180™ INTERFACED WITH THE SCC AT MHZ

      APPLICATION NOTE 7 THE Z180™ INTERFACED WITH THE SCC AT MHZ

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      Source URL: www-clips.imag.fr

      Language: English - Date: 2000-03-27 07:32:34
      8June 10, 2013 Tohoku University NEC Corporation Tohoku University Develops World’s First Nonvolatile Memory Applicable to L3 Cache

      June 10, 2013 Tohoku University NEC Corporation Tohoku University Develops World’s First Nonvolatile Memory Applicable to L3 Cache

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      Source URL: www.csis.tohoku.ac.jp

      Language: English - Date: 2013-06-12 22:18:22
      9Adaptive Mode Control: A Static-Power-Efficient Cache Design Huiyang Zhou, Mark C. Toburen, Eric Rotenberg, Thomas M. Conte Department of Electrical and Computer Engineering North Carolina State University {hzhou, mctobu

      Adaptive Mode Control: A Static-Power-Efficient Cache Design Huiyang Zhou, Mark C. Toburen, Eric Rotenberg, Thomas M. Conte Department of Electrical and Computer Engineering North Carolina State University {hzhou, mctobu

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      Source URL: research.ac.upc.edu

      Language: English - Date: 2002-03-20 08:47:54
      10

      PDF Document

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      Source URL: www.soft-test.com

      Language: English - Date: 2013-02-18 04:20:00