Microprocessors

Results: 844



#Item
341Central processing unit / Parallel computing / Microprocessors / Computer memory / CPU cache / Microarchitecture / Cache / Automatic parallelization / Superscalar / Computer hardware / Computer architecture / Computing

Software Logging under Speculative Parallelization ´ Garzar´an, Milos Prvulovicy , Jos´e Mar´ıa Llaber´ıaz , Mar´ıa Jesus ˜ V´ıctor Vinals, Lawrence Rauchwergerx , and Josep Torrellasy

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2001-09-30 19:59:18
342Reduced instruction set computing / Acorn Computers / Microprocessors

Our second issue! RISC Data Analysis Tool Do You Use the RISC Smileys?

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Source URL: marilliondesigns.com

Language: English - Date: 2008-04-20 01:32:59
343Firmware / DEC Alpha / PALcode / Digital Equipment Corporation / OpenVMS / Tru64 UNIX / Unix / Operating system / Compaq / Computer architecture / Computing / System software

Alpha Microprocessors Motherboard Software Design Tools User’s Guide Order Number: EC–QHUWE–TE Revision/Update Information:

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Source URL: download.majix.org

Language: English - Date: 2013-01-10 05:04:12
344Parallel computing / Application programming interfaces / Scheduling algorithms / Threads / Microprocessors / Double-ended queue / Task parallelism / OpenMP / Continuation / Computing / Concurrent computing / Computer programming

Steal Tree: Low-Overhead Tracing of Work Stealing Schedulers Jonathan Lifflander Sriram Krishnamoorthy Laxmikant V. Kale

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Source URL: charm.cs.illinois.edu

Language: English - Date: 2013-04-02 17:49:02
345Computer hardware / Central processing unit / Threads / Microprocessors / Lock / Non-blocking algorithm / Simultaneous multithreading / Parallel computing / Critical section / Concurrency control / Computing / Computer architecture

Wshp. on Memory Performance Issues, Intl. Symp. on Computer Architecture, June[removed]Speculative Locks for Concurrent Execution of Critical Sections in Shared-Memory Multiprocessors Jose´ F. Mart´ınez and Josep Torre

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2003-12-19 18:12:59
346Computer memory / Scheduling algorithms / Microprocessors / Computer architecture / Multi-core processor / Parallel computing / AMD 10h / Jumbo frame / CPU cache / Computing / Computer hardware / Concurrent computing

Characterizing the Impact of End-System Affinities On the End-to-End Performance of High-Speed Flows Nathan Hanford1 , Vishal Ahuja1 , Mehmet Balman2 , Matthew K. Farrens1 , Dipak Ghosal1 , Eric Pouyoul2 and Brian Tierne

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Source URL: www.es.net

Language: English - Date: 2014-12-11 12:32:11
347Support groups / Psychiatry / Mind / Health / Microprocessors / Super Harvard Architecture Single-Chip Computer / Recovery approach / GROW / Peer support / Twelve-step programs / Drug rehabilitation / Mental health

SHARC annual report 01 Chairman’s Report As a result of planning and robust management, the 2011 financial year saw SHARC return to an operating surplus

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Source URL: sharc.org.au

Language: English - Date: 2014-09-24 02:22:56
348Computer architecture / Central processing unit / Parallel computing / Microprocessors / CPU cache / Simultaneous multithreading / Multithreading / Computing / Computer hardware / Threads

BulkSMT: Designing SMT Processors for Atomic-Block Execution∗ Xuehai Qian, Benjamin Sahelices and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu Abstract

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2012-01-18 11:44:30
349Central processing unit / Microprocessors / Josep Torrellas / Speculative execution / Debugging / Microarchitecture / Kernel / Computer program / Compiler / Computing / Computer architecture / Computer hardware

Prototyping Architectural Support for Program Rollback: An Application to Software Debugging Radu Teodorescu and Josep Torrellas University of Illinois at Urbana-Champaign Several recently-proposed architectural techniqu

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-03-04 16:59:35
350Central processing unit / Parallel computing / Classes of computers / Microprocessors / Superscalar / Microarchitecture / Speculative multithreading / SPECint / Coprocessor / Computing / Computer hardware / Computer architecture

Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation∗ Jose Renau† James Tuck Wei Liu Luis Ceze Karin Strauss Josep Torrellas † Dept. of Computer Engineering, University of

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-09-06 12:30:36
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