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Memory management unit
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1	Chapter 9 Virtual Memory Processes in a system share the CPU and main memory with other processes. However, sharing the main memory poses some special challenges. As demand on the CPU increases, processes slow down in s Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2010-02-14 14:17:32 Computing Virtual memory Computer memory Memory management Computer hardware Computer architecture Central processing unit Page table Memory management unit Thrashing Paging Address space
2	Accelerating Two-Dimensional Page Walks for Virtualized Systems Ravi Bhargava Computing Solutions Group Advanced Micro Devices Austin, TX Add to Reading List Source URL: vglab.cse.iitd.ac.in Language: English - Date: 2011-07-25 05:59:26 Computer hardware Computing Computer architecture Memory management Central processing unit Virtual memory Computer memory Hardware virtualization Translation lookaside buffer Page table Second Level Address Translation CPU cache
3	1 Partial Paging for Real-Time NoC Systems Adrian McMenamin and Neil C. Audsley Department of Computer Science, University of York, UK email: [acm538,neil.audsley]@york.ac.uk Add to Reading List Source URL: www.mpi-sws.org Language: English - Date: 2016-07-14 16:23:27 Virtual memory Computing Computer architecture Computer hardware Translation lookaside buffer Page replacement algorithm Page table Thrashing Paging Memory management unit Page Demand paging
4	Intel SGX Explained Victor Costan and Srinivas Devadas , Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2016-08-12 18:27:31 Computing Computer architecture Computer hardware Computer memory Central processing unit Memory management Virtual memory Memory address Memory protection 64-bit computing X86 Random-access memory
5	Performance Evaluation of Intel EPT Hardware Assist Performance Evaluation of Intel EPT Hardware Assist VMware ESX builds & internal builds) Add to Reading List Source URL: www.vmware.com Language: English - Date: 2009-03-30 18:27:12 Hardware virtualization Memory management Virtual memory Central processing unit Microprocessors Second Level Address Translation X86 virtualization Memory management unit Hyper-V Translation lookaside buffer VMware Benchmark
6	Virtual machine-provided Context sensitive page mappings Nathan Rosenblum, Gregory Cooksey, Barton P. Miller Computer Sciences Department University of Wisconsin Add to Reading List Source URL: vee08.cs.tcd.ie Language: English - Date: 2008-03-12 14:38:12 Computer memory PaX Memory architecture Data Virtual memory Computer architecture Memory management Central processing unit
7	Region-based Memory Management for GPU Programming Languages Enabling Rich Data Structures on a Spartan Host Andrew Lumsdaine Ar Add to Reading List Source URL: www.cs.indiana.edu Language: English - Date: 2015-05-05 11:07:44 Parallel computing GPGPU Graphics hardware Video cards Memory management OpenCL General-purpose computing on graphics processing units Compute kernel Linux kernel Graphics processing unit Pointer CUDA
8	Using Cortex-M3 and Cortex-M4 Fault Exception Application Note 209 Abstract The Cortex-M processors implement an efficient exception model that also traps illegal memory accesses and several incorrect program conditions. Add to Reading List Source URL: www.keil.com Language: English - Date: 2016-03-11 03:37:29 Computer errors Memory management Central processing unit Instruction set architectures ARM architecture Bus error Control register Page fault Segmentation fault Memory protection ARM Cortex-M Exception handling
9	REGION-BASED MEMORY MANAGEMENT FOR EXPRESSIVE GPU PROGRAMMING Eric Holk Submitted to the faculty of the University Graduate School Add to Reading List Source URL: blog.theincredibleholk.org Language: English - Date: 2016-07-28 23:54:43 GPGPU Parallel computing Graphics hardware Graphics processing unit Virtual reality Compute kernel Kernel General-purpose computing on graphics processing units
10	PDF Document Add to Reading List Source URL: www.ieee-security.org Language: English - Date: 2015-05-11 16:42:58 Memory management Instruction set architectures Memory protection Capability-based security Kernel Memory management unit MIPS instruction set Protection ring Microkernel EROS Virtual memory 64-bit computing