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Manycore
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51	Resource Management in the Tessellation Manycore OS ∗ Juan A. Colmenares, Sarah Bird, Henry Cook, Paul Pearce, David Zhu, John Shalf† , Steven Hofmeyr† , Krste Asanovi´c, and John Kubiatowicz The Parallel Computin Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2014-02-17 17:32:41 Teletraffic Network performance Quality of service Streaming Telecommunications engineering Multi-core processor Kernel Virtual machine Scheduling System software Computing Computer architecture
52	The Art of Performance Tuning for CUDA and Manycore Architectures David Tarjan (NVIDIA) Kevin Skadron (U. Virginia) Paulius Micikevicius (NVIDIA) Add to Reading List Source URL: www.cs.virginia.edu Language: English - Date: 2009-12-01 18:11:09 Nvidia Graphics hardware Video cards Computer programming Parallel computing CUDA Kernel OpenMP Computing Computer hardware GPGPU
53	Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitris Tsaliagkos, Manolis Katevenis, Dionisios Pnevmatikatos a Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 Computer memory Field-programmable gate array MicroBlaze Xilinx CPU cache Multi-core processor Dynamic random-access memory Joint Test Action Group NetFPGA Computer hardware Computing Electronic engineering
54	Analysing Manycore OS Design Aspects in NIX Gorka Guardiola LSUB Add to Reading List Source URL: lsub.org Language: English - Date: 2014-05-08 10:53:34 Linux kernel System software Scheduling algorithms Software Kernel Computer architecture
55	Exploring Manycore Multinode Systems for Irregular Applications with FPGA Prototyping Marco Ceriani, Simone Secchi, Antonino Tumeo, Oreste Villa and Gianluca Palermo Motivation Prototype features Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-12-16 15:05:06 Electronics Microprocessors Fabless semiconductor companies Concurrency control Computer architecture Xilinx Multi-core processor Thread Field-programmable gate array Computing Parallel computing Electronic engineering
56	March[removed]High Performance Data-Path Processing Solutions 1 Add to Reading List Source URL: www.ezchip.com Language: English - Date: 2015-03-02 08:43:08 Electronics Reconfigurable computing Manycore Tilera Multi-core processor Network processor EZchip Semiconductor TILE-Gx Forwarding plane Computing Microprocessors Parallel computing
57	Accelerating the Data Plane With the TILE-Mx Manycore Processor Bob Doud Director of Marketing EZchip Add to Reading List Source URL: www.tilera.com Language: English - Date: 2015-02-26 07:18:16 Microprocessors Electronics Parallel computing Network processor Networking hardware Multi-core processor Packet Processing Tile processor Stateful firewall Computing Computer network security Cyberwarfare
58	March[removed]High Performance Data-Path Processing Solutions 1 Add to Reading List Source URL: www.tilera.com Language: English - Date: 2015-03-02 08:43:08 Electronics Reconfigurable computing Manycore Tilera Multi-core processor Network processor EZchip Semiconductor TILE-Gx Forwarding plane Computing Microprocessors Parallel computing
59	Accelerating the Data Plane With the TILE-Mx Manycore Processor Bob Doud Director of Marketing EZchip Add to Reading List Source URL: www.ezchip.com Language: English - Date: 2015-02-26 07:18:16 Microprocessors Electronics Parallel computing Network processor Networking hardware Multi-core processor Packet Processing Tile processor Stateful firewall Computing Computer network security Cyberwarfare
60	SEEING IS UNDERSTANDING: DEBUGGING WITH THE MULTICORE VISUALIZER EclipseCon[removed]William R. Swanson Add to Reading List Source URL: wiki.eclipse.org Language: English - Date: 2012-03-30 12:23:51 Computer programming Parallel computing Manycore Tilera Multicore TILE-Gx Adapteva GNU Debugger Thread Computing Reconfigurable computing Microprocessors

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