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21	Godson-2E software manual Contents 1 Godson-2E Micro Architecture...................................................................................1 1.1 Godson Series Processors ........................................ Add to Reading List Source URL: dev.lemote.com Language: English - Date: 2011-05-04 12:04:52 Central processing unit CPU cache Translation lookaside buffer Loongson Processor register Control register Instruction set Addressing mode MIPS instruction set Draft:Cache memory
22	MIPSproTM N32 ABI Handbook 007–2816–005 CONTRIBUTORS Written by George Pirocanac Add to Reading List Source URL: math-atlas.sourceforge.net Language: English - Date: 2009-02-25 17:41:18 Advanced RISC Computing Calling convention Subroutines MIPS Technologies MIPS instruction set Silicon Graphics 64-bit computing IRIX R10000 N32 R4000
23	TRENDS IN HARDWARE FOR GEOGRAPHIC INFORMATION SYSTEMS Jack Dangermond Scott Morehouse Environmental Systems Research Institute 380 New York Street Add to Reading List Source URL: mapcontext.com Language: English - Date: 2008-08-30 00:31:44 Classes of computers Computer workstations Advanced RISC Computing MIPS Technologies Parallel computing Workstation MIPS instruction set Operating system Minicomputer File server ArcInfo Computer cluster
24	Chapter 1 Performance Measures Reading: The corresponding chapter in the 2nd edition is Chapter 2, in the 3rd edition it is Chapter 4 and in the 4th edition it is Chapter 1. When selecting a computer, there are differen Add to Reading List Source URL: eceweb.ucsd.edu Language: English - Date: 2015-07-31 19:30:10 Central processing unit Clock signal Computer performance Instruction set architectures Cycles per instruction Rates MIPS instruction set Instructions per second Clock rate CPU time Protection ring Computer
25	PDF Document Add to Reading List Source URL: www.ieee-security.org Language: English - Date: 2015-05-11 16:42:58 Memory management Instruction set architectures Memory protection Capability-based security Kernel Memory management unit MIPS instruction set Protection ring Microkernel EROS Virtual memory 64-bit computing
26	Advanced Parallel Architecture Annalisa Massini Vector architecture 2 Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-04-28 17:33:30 Central processing unit Parallel computing Computer architecture Supercomputers Instruction set architectures Processor register Cray-1 MIPS instruction set SIMD Instruction set 64-bit computing Euclidean vector
27	MILLIMAN WHITE PAPER MACRA: Overview for providers Colleen Norris, FSA, MAAA Add to Reading List Source URL: www.milliman.com Language: English - Date: 2016-07-19 22:45:50 Healthcare reform in the United States Federal assistance in the United States Presidency of Lyndon B. Johnson Medicare MIPS Accountable care organization Health insurance Medicaid
28	Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2015-12-01 06:21:41 Instruction set architectures Central processing unit Computer architecture Memory management Memory protection Capability-based security Pointer MIPS instruction set 64-bit computing Instruction set Reduced instruction set computing Kernel
29	Advanced and parallel architectures Cognome Nome Prof. A. Massini Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-07-14 14:33:32 Parallel computing Advanced RISC Computing MIPS instruction set Instruction pipelining Hazard