NESUS IC1305 Network for Sustainable Ultrascale Computing

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• Computing
• Parallel computing
• Computer architecture
• GPGPU
• Graphics hardware
• High-definition television
• Video compression
• General-purpose computing on graphics processing units
• Graphics processing unit
• Multi-core processor
• Tegra
• Fermi

PDF Document

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• Emerging technologies
• Bioinformatics
• Korea Development Institute
• Personalized medicine

JOURNAL OF APPLIED PHYSICS 99, 08B307 共2006兲 Diode/magnetic tunnel junction cell for fully scalable matrix-based biochip F. A. Cardoso,a兲 H. A. Ferreira, and J. P. Conde INESC-Microsystems and Nanotechnologies, Ru

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• Electromagnetism
• Magnetism
• Spintronics
• Biochip
• Microarrays
• Molecular biology
• Proteomics
• Diode
• Magnetic nanoparticles
• Tunnel magnetoresistance
• Magnet
• Hall effect

technology
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G. Falca˜o, V. Silva, L. Sousa and J. Marinho A novel, flexible and scalable parallel LDPC decoding approach for the WiMAX wireless broadband standard (IEEE 802.16e) in the multicore Cell broadband engine architecture

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• Error detection and correction
• Computing
• Computer architecture
• Low-density parity-check code
• Forward error correction
• Electrical engineering
• Cell
• WiMAX
• Eb/N0

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, VOL. 26, NO. 3, MARCHAdaptive Scheduling Framework for Real-Time Video Encoding on Heterogeneous Systems

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• Computer architecture
• Computing
• ARM architecture
• Computer engineering
• Graphics hardware
• System on a chip
• GPGPU
• Nvidia
• Tegra
• Raspberry Pi
• Graphics processing unit
• MVS

Guest Editors’ Introduction Ubiquitous Multimedia: Emerging Research on

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• Visual arts
• Multimedia
• Computing
• IEEE MultiMedia
• IEEE Computer Society
• Streaming media
• High Efficiency Video Coding
• Thomas Huang
• Michael Lew

2014 IEEE International Conference on Acoustic, Speech and Signal Processing (ICASSP) COOPERATIVE CPU+GPU DEBLOCKING FILTER PARALLELIZATION FOR HIGH PERFORMANCE HEVC VIDEO CODECS Diego F. de Souza, Nuno Roma, Leonel Sou

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• Computing
• Video
• Video compression
• Data compression
• Videotelephony
• High-definition television
• ISO standards
• Graphics file formats
• High Efficiency Video Coding
• Deblocking filter
• Graphics processing unit
• H.264/MPEG-4 AVC

Chapter 1 CUSTOMIZABLE AND REDUCED HARDWARE MOTION ESTIMATION PROCESSORS Nuno Roma, Tiago Dias, Leonel Sousa Abstract

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• Digital media
• Video
• Media technology
• Digital television
• Noise
• Video compression
• Display technology
• Image processing
• Video quality
• Peak signal-to-noise ratio
• Pixel
• Block-matching algorithm

Monitoring Performance and Power for Application Characterization with the Cache-aware Roofline Model Diogo Ant˜ao, Lu´ıs Tani¸ca, Aleksandar Ilic, Frederico Pratas, Pedro Tom´as, and Leonel Sousa INESC-ID / Institu

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• Computer architecture
• Computing
• Computer engineering
• Concurrent computing
• Central processing unit
• Thread
• Scheduling
• Kernel
• Roofline model
• CPU cache
• Multi-core processor
• ARC