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#	Item
541	Powerful FPGA platform simplifies USB 2.0 integration, reduces LSI development time and supports sub-100ms hardware reconfiguration Flexible Morph-IC-II platform from FTDI combines Altera Cyclone®-II FPGA with silicon a Add to Reading List Source URL: www.ftdichip.com Language: English - Date: 2012-06-18 06:43:34 Embedded systems Fabless semiconductor companies Field-programmable gate array Universal Serial Bus FTDI Joint Test Action Group Altera USB flash drive Home computer remakes Electronics Electronic engineering Technology
542	Nios II Software Developer’s Handbook Nios II Software Developer’s Handbook 101 Innovation Drive Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-06-13 01:17:40 Electronic engineering Real-time operating systems Nios II Embedded systems Nios embedded processor MicroC/OS-II Board support package Altera Sopc builder Electronics Embedded operating systems Computing
543	Xu J, Ji LD, Xu LH. Lead-induced apoptosis in PC 12 cells: involvement of p53, Bcl-2 family and caspase-3. Toxicol Lett 2006; 166: [removed]Xu J, Lian LJ, Wu C, et al. Lead induces oxidative stress, DNA damage and altera Add to Reading List Source URL: monographs.iarc.fr Language: English - Date: 2012-08-13 13:03:00 Phosphides Poor metals Post-transition metals Oxides Indium Gallium Arsenic Light-emitting diode Laser diode Chemistry Matter Chemical elements
544	Processor-In-Memory System Simulator Andrew Huang Artificial Intelligence Laboratory Massachusetts Institue Of Technology Cambridge, Massachusetts[removed]http://www.ai.mit.edu Add to Reading List Source URL: www.ai.mit.edu Language: English - Date: 2001-05-14 14:06:59 Computing Computer memory Field-programmable gate array Dynamic random-access memory Xilinx RDRAM Altera Synchronous dynamic random-access memory Emulator Electronic engineering Fabless semiconductor companies Computer hardware
545	Success Story Synopsys and Signalcrafters Tech, Inc. Signalcrafters Achieves Design Goals and Cuts FPGA Cost by 50% in its FPGA-for-DSP Solution with Synplify FPGA Design Tools Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:29:32 Fabless semiconductor companies Field-programmable gate array Altera Electronic design automation Electronic engineering Hillsboro Oregon Synopsys
546	A Protocol for Secure Remote Updates of FPGA Configurations Saar Drimer, Markus G. Kuhn Computer Laboratory, University of Cambridge, http://www.cl.cam.ac.uk/users/{sd410,mgk25} Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2009-03-30 10:43:41 Computing Computer hardware Bitstream Data transmission Field-programmable gate array Altera Xilinx Non-volatile memory Booting Electronic engineering Reconfigurable computing Fabless semiconductor companies
547	AN 570: Implementing the 40G/100G Ethernet Protocol in Stratix IV Devices AN[removed]Application Note Add to Reading List Source URL: www.altera.com Language: English - Date: 2011-09-07 17:17:23 Computing Altera PHY Field-programmable gate array Interlaken IEEE 802.3 40G 64b/66b encoding Physical Coding Sublayer OSI protocols Ethernet Electronic engineering
548	AN 572: Implementing the Scalable SERDES Framer Interface (SFI-S) Protocol in Stratix IV GT Devices AN[removed] © January 2010 Add to Reading List Source URL: www.altera.com Language: English - Date: 2010-01-06 18:06:42 Networking hardware Technology SerDes Framer Interface Ethernet Digital electronics Altera Optical Internetworking Forum SerDes Field-programmable gate array Electronic engineering Electronics Fiber-optic communications
549	Microsoft Word - altera_roma_master_schedule.docx Add to Reading List Source URL: www.getty.edu Language: English - Date: 2010-03-15 16:40:02 Getty Villa J. Paul Getty Aztec John Paul Getty Jr. Getty Research Institute Human sacrifice in Aztec culture Los Angeles J. Paul Getty Trust Americas California
550	Datasheet Synplify Premier Fast, Reliable FPGA Implementation and Debug Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-01-28 12:16:00 Electronic design Integrated circuits Fabless semiconductor companies Field-programmable gate array Logic synthesis High-level synthesis Timing closure Altera Integrated circuit design Electronic engineering Electronics Electronic design automation

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