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SerDes
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#	Item
1	Case Study of Half Power, Multi Protocol SERDES in 28nm FDSOI Unparalleled Power Performance 1 Add to Reading List Source URL: soiconsortium.org - Date: 2016-04-25 06:53:48
2	Client: MoSys Contact: Kristine Perham & Michael Miller Project: Chip Estimates Article From: Lee Stein Date: March 5, 2010 Add to Reading List Source URL: www.steinwrites.com Language: English - Date: 2010-07-20 21:33:13 Computing Computer hardware Standards organizations Computer buses Network performance RapidIO PCI Express MoSys USB Interlaken SerDes Throughput
3	Proposed VLBI Standard Hardware Interface Specification – VSI-H 11 May 2000 Table of Contents. Add to Reading List Source URL: vlbi.org Language: English - Date: 2009-08-18 16:35:00 Computer buses Low-voltage differential signaling Clock signal RS-232 Media-independent interface SerDes
4	25-MarLev Uvarov MPC – SP Synchronization Procedure Petersburg Nuclear Physics Institute / University of Florida Add to Reading List Source URL: www.phys.ufl.edu Language: English - Date: 2002-04-01 10:14:01 Electronics Parallel communication SerDes 8b/10b encoding Frame synchronization Serial communication JESD204 Universal asynchronous receiver/transmitter Data transmission Telecommunications engineering Electronic engineering
5	Microsoft Word - OIF-TFI5-01.0.doc Add to Reading List Source URL: www.oiforum.com Language: English - Date: 2004-12-03 15:37:24 Network protocols Network architecture Computing TDM Fabric to Framer Interface TFI-5 Optical Internetworking Forum SerDes Framer Interface System Packet Interface Optical Transport Network Multiplexing OSI protocols Fiber-optic communications
6	DESIGNCON 2011 Technical Papers The Universal PCB Design Grid System Tom Hausherr Receiver Tolerance Testing With Crosstalk Aggressors Arvind Kumar, Martin Miller Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Electronic design automation Jitter Synchronization Signal integrity Phase noise SerDes Field-programmable gate array Electronic engineering Electronics Digital electronics
7	Error Detector Module L-6001-EED428-1 DESCRIPTION EED428 is an Electrical Error Detector module that plugs into the ParalleX® Chassis. EED428 can check 4 channels electrical data from 25.6 Gb/s up to 28.4 Gb/s. It opera Add to Reading List Source URL: www.luceotec.com Language: English - Date: 2015-04-20 19:10:41 Radio electronics Digital electronics Bit error rate Data transmission Network performance Ratios Detector Universal Serial Bus SerDes Electronic engineering Measurement Telecommunications engineering
8	Implementation Agreement for Integrated Polarization Multiplexed Quadrature Modulated Transmitters IA # OIF-PMQ-TX-01.1 Add to Reading List Source URL: www.oiforum.com Language: English - Date: 2013-11-11 10:37:36 Network protocols Modulation Computing Technology Data transmission SerDes Framer Interface Fiber-optic communications Consortia Optical Internetworking Forum
9	Microsoft Word - OIF-VSR4-03.1.doc Add to Reading List Source URL: www.oiforum.com Language: English - Date: 2004-12-03 19:23:35 Telecommunications engineering Electronic engineering Optical communications Consortia Optical Internetworking Forum Multiplexing SerDes Framer Interface Synchronous optical networking 10 Gigabit Ethernet Fiber-optic communications Network protocols OSI protocols
10	oif2011.097.xx_ForPublication Add to Reading List Source URL: www.oiforum.com Language: English - Date: 2012-02-27 09:55:03 Computing JavaScript Network protocols SerDes Framer Interface Fiber-optic communications Consortia Optical Internetworking Forum

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