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X86
Results: 2025

#	Item
701	An evaluation of the automatic generation of parallel X86 SIMD integer instructions by GCC and ICC Isabelle Hurbain November, 15th Add to Reading List Source URL: www.cri.ensmp.fr Language: English - Date: 2006-02-28 09:49:25 X86 instructions X86 architecture C programming language Concurrency control Volatile variable Parallel computing CPUID X86 MOV Computing Computer architecture Software
702	radare LaCon2008 --pancake radare Add to Reading List Source URL: radare.org Language: English - Date: 2008-09-25 12:02:36 MOV INT Binary file Disassembler Hex editor Computer architecture X86 instructions Computing
703	“Quantum” Performance Effects v 2.0; November 2013 Sergey Kuksenko , @kuksenk0 Add to Reading List Source URL: shipilev.net Language: English - Date: 2013-11-26 10:56:46 X86 architecture Xubuntu Nehalem Sandy Bridge OpenJDK X86-64 Xeon Ivy Bridge Bulldozer Software Computer architecture Computing
704	radare2 //rooted pancake nibble Add to Reading List Source URL: radare.org Language: English - Date: 2010-03-22 11:14:00 Scripting languages Cross-platform software Machine code NOP Nothing Lua Eric Python IDE INT Python Software Computing X86 instructions
705	Reversing a Simple Shellcode with Radare2 Edd Barrett @vext01 August 12, 2011 Add to Reading List Source URL: radare.org Language: English - Date: 2011-09-07 11:20:25 X86-64 X86 INT Computer architecture X86 architecture Shellcode
706	Undermining Isolation through Covert Channels in the Fiasco.OC Microkernel Michael Peter Matthias Petschick Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2014-12-10 16:02:06 X86 architecture Covert channel Linux kernel Microkernel Mach Kernel Overt channel Operating system Channel Computer architecture Computing Slab allocation
707	Claude TADONKI Mines ParisTech – Paris/France Seminar at Universidad Santiago de Chile August 6, 2014 SANTIAGO - CHILE Add to Reading List Source URL: www.cri.ensmp.fr Language: English - Date: 2014-12-23 08:31:37 Streaming SIMD Extensions SIMD Advanced Vector Extensions X86 SSE2 MMX Instruction set SSE3 Processor register Computer architecture Computing X86 instructions
708	5th Generation Intel® Core™ Processor Family, Intel® Core™ M Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Add to Reading List Source URL: www.intel.sa Language: English - Date: 2015-03-27 18:48:00 X86 architecture Intel Core Celeron Intel Multi-core processor Hyper-threading Pentium Clarkdale Arrandale Computer hardware Computing Computer architecture
709	An Incremental Approach to Compiler Construction Abdulaziz Ghuloum Department of Computer Science, Indiana University, Bloomington, INAbstract Add to Reading List Source URL: www.schemeworkshop.org Language: English - Date: 2011-08-12 16:48:43 Subroutines Programming language implementation Procedural programming languages X86 architecture Compiler construction Scheme Closure Pointer Calling convention Software engineering Computing Computer programming
710	Microsoft Word - dataSheet_secureCore_070917A_UPDATED.doc Add to Reading List Source URL: www.phoenix.com Language: English - Date: 2015-02-02 16:18:50 Computing Unified Extensible Firmware Interface Intel vPro Phoenix Technologies Advanced Micro Devices Intel X86-64 X86 Firmware BIOS Computer hardware Computer architecture

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