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Results: 135

#	Item
1	Knights Landing (KNL): 2nd Generation Intel® Xeon Phi™ Processor Avinash Sodani KNL Chief Architect Senior Principal Engineer, Intel Corp. Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2015-08-21 02:18:27 Computing Computer architecture Computer engineering X86 instructions Intel Corporation Parallel computing Xeon Phi AVX-512 Intel Core CPUID Xeon Haswell
2	Sandboxing: Software Fault Isolation Scenarios for Sandboxing • Web Browser Plug‐ins o Security hole in plug‐in compromises browser o Impose restrictions on plug‐in • Downloaded execut Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2015-01-21 19:48:42 X86 architecture MOV X86 JMP Sandbox NOP CPUID X86 assembly language Computer architecture X86 instructions Machine code
3	Machine-‐Level Programming II: Control Structures and Procedures Spring 2012 Instructors: Aykut & Erkut Erdem Add to Reading List Source URL: web.cs.hacettepe.edu.tr Language: English - Date: 2012-03-08 00:10:45 TEST X86 INT Integer CPUID Computer architecture X86 instructions MOV
4	ECE391: Computer Systems Engineering Fall 2014 Pre-Lab 1 Due: Tuesday 9 September, 1:30 PM, in the ECE 391 homework drop box Assembly, C, and Optimization 1. Mapping C to Assembly Add to Reading List Source URL: courses.engr.illinois.edu Language: English - Date: 2014-09-03 13:27:58 Assembly languages CPUID Machine code Volatile variable X86 assembly language X86 MOV JMP INT Computer architecture X86 architecture X86 instructions
5	Intel® Core™ i7 Processor Family for LGA2011 Socket Specification Update Supporting Desktop Intel® Core™ i7-4960X Extreme Edition Processor Series for the LGA2011 Socket Supporting Desktop Intel® Core™ i7-49xx a Add to Reading List Source URL: www.intel.com Language: English - Date: 2015-01-09 15:28:45 Computing Intel Core Intel CPUID Xeon Pentium D Pentium 4 LGA X86-64 Computer hardware Computer architecture X86 architecture
6	The CVEvulnerability in Microsoft’s Vector Graphics Rendering Engine (vgx Add to Reading List Source URL: www.mnin.org Language: English - Date: 2006-10-05 18:14:03 X86 instructions Machine code Zeroday Emergency Response Team MOV X86-64 Exit NOP CPUID High Level Assembly Computer architecture X86 architecture Computing
7	The Torpig/Anserin/Sinowal family of Trojans detect virtual machine monitors and abort infection when present Add to Reading List Source URL: www.mnin.org Language: English - Date: 2006-09-10 17:56:52 X86 architecture UPX Computing MOV Assembly languages CPUID Computer architecture Software X86 instructions
8	Extracting Xor-Encoded Files From Malware With IDAPython Add to Reading List Source URL: www.mnin.org Language: English - Date: 2006-09-10 20:41:00 Logic Propositional calculus Tar Computing Computer architecture Mathematics CPUID X86 assembly language X86 architecture Boolean algebra Exclusive or
9	Live Range Hole Allocation in Dynamic Binary Translation Wesley Attrot Daniel Nic´acio Add to Reading List Source URL: amas-bt.ece.utexas.edu Language: English - Date: 1980-01-01 01:00:00 Computing Assembly languages MOV Transmeta X86 Hooking JMP High Level Assembly CPUID Computer architecture X86 architecture X86 instructions
10	F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2014-07-04 21:30:09 Computer architecture Cache CPU cache Computing Computer data storage CPUID Acumem SlowSpotter AMD 10h Computer memory Computer hardware Central processing unit

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