| Document Date: 2006-08-24 08:01:51
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City Seoul / Austin / / Company RTL / ACM Press / / Country Korea / / Currency USD / / / IndustryTerm compiler register renaming algorithms / register reassignment algorithm / processor energy / energy consumption / instruction packing algorithms / reduced energy consumption / partial solution / greedy algorithm / energy requirements / layout tool / software pipelin / energy saving techniques / code positioning algorithms / energy estimates / overall processor energy consumption / relative energy benefit / instruction scheduling algorithm / energy efficiency / energy benefits / energy reduction / embedded developer / energy savings / energy / / Organization National Science Foundation / Florida State University / Computer Systems Organization / / Person D. Brooks / V / Gary Tyson / David Whalley / / Position Processor Architectures General / intra-block scheduler / application characteristics representative / rt / compiler writer / rs/rt / bits opcode rs rt / opcode rs rt immediate value opcode rs rt / / Product MiBench / / ProgrammingLanguage FL / C / / Technology code positioning algorithms / promotion algorithm / IRF register reassignment algorithm / greedy algorithm / GSM / instruction scheduling algorithm / Existing instruction packing algorithms / compiler register renaming algorithms / /
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Adapting Compilation Techniques to Enhance the Packing of Instructions into Registers Stephen Hines, David Whalley, Gary Tyson Computer Science Department Florida State University Tallahassee, FL