Synchronous circuit

Results: 18



#Item
1NTE843 Integrated Circuit TV Video IF Phase Locked Loop (PLL) Synchronous Detector Description: The NTE843 is a linear IC synchronous detector employing a phase–locked oscillator to demodulate

NTE843 Integrated Circuit TV Video IF Phase Locked Loop (PLL) Synchronous Detector Description: The NTE843 is a linear IC synchronous detector employing a phase–locked oscillator to demodulate

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Source URL: www.nteinc.com

Language: English - Date: 2000-08-15 15:26:37
    2HSM1Hybrid Synchronous Motor High power density - produced in large quantities Highlights  •	 Intrinsically safe: low short-circuit torque, manageable short-circuit current and induced voltage

    HSM1Hybrid Synchronous Motor High power density - produced in large quantities Highlights • Intrinsically safe: low short-circuit torque, manageable short-circuit current and induced voltage

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    Source URL: www.brusa.biz

    - Date: 2016-02-16 05:36:13
      3CS61c: State Elements: Circuits That Remember J. Wawrzynek October 12, 2007 Reading: P&H, Appendix B

      CS61c: State Elements: Circuits That Remember J. Wawrzynek October 12, 2007 Reading: P&H, Appendix B

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      Source URL: www-inst.eecs.berkeley.edu

      Language: English - Date: 2007-10-15 00:05:28
      4Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis Charles R. Bond http://www.crbond.com

      Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis Charles R. Bond http://www.crbond.com

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      Source URL: www.crbond.com

      Language: English - Date: 2013-07-09 13:31:54
      5F  Marching Without a Beat Steven Nowick Professor of Computer Science

      F Marching Without a Beat Steven Nowick Professor of Computer Science

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      Source URL: www.cs.columbia.edu

      Language: English - Date: 2011-06-05 13:52:40
      6The Design of Low-Latency Interfaces for Mixed-Timing Systems Tiberiu Chelcea and Steven M. Nowick Department of Computer Science Columbia University

      The Design of Low-Latency Interfaces for Mixed-Timing Systems Tiberiu Chelcea and Steven M. Nowick Department of Computer Science Columbia University

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      Source URL: www.cs.columbia.edu

      Language: English - Date: 2008-11-28 17:14:05
      7Microsoft PowerPoint - MEMTestIssuesFinal.ppt

      Microsoft PowerPoint - MEMTestIssuesFinal.ppt

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      Source URL: grouper.ieee.org

      Language: English - Date: 2007-03-20 12:53:04
      8ECE 3650 Electric Machines Course Outline – Winter Term 2014 Course Objectives Constructional features, analysis, modeling, and applications of three phase transformers, synchronous machines, and single phase induction

      ECE 3650 Electric Machines Course Outline – Winter Term 2014 Course Objectives Constructional features, analysis, modeling, and applications of three phase transformers, synchronous machines, and single phase induction

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      Source URL: umanitoba.ca

      Language: English - Date: 2014-09-09 16:31:32
      9F  Marching Without a Beat Steven Nowick Professor of Computer Science

      F Marching Without a Beat Steven Nowick Professor of Computer Science

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      Source URL: engineering.columbia.edu

      Language: English - Date: 2011-03-18 14:59:30
      10Achieving Lowest System Power with Low-Power 28-nm FPGAs WP[removed]White Paper

      Achieving Lowest System Power with Low-Power 28-nm FPGAs WP[removed]White Paper

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      Source URL: www.altera.com

      Language: English - Date: 2012-03-26 14:59:00