The Design of Low-Latency Interfaces for Mixed-Timing Systems Tiberiu Chelcea and Steven M. Nowick Department of Computer Science Columbia University - Synchronous circuit - Document - PDFSEARCH.IO

First Page	Meta Content
	The Design of Low-Latency Interfaces for Mixed-Timing Systems Tiberiu Chelcea and Steven M. Nowick Department of Computer Science Columbia University Add to Reading List Document Date: 2008-11-28 17:14:05 Open Document File Size: 1,36 MB Share Result on Facebook Company Intel / / Facility University Keynote Invited Talk / / IndustryTerm power management / asynchronous systems / electronics / / Organization Semiconductor Industry Association / Mixed-Timing Systems Tiberiu Chelcea and Steven M. Nowick Department of Computer Science Columbia University Keynote Invited Talk / / Person Steven M. Nowick / / Technology Domains Chips / Chip Design / System-on-a-Chip / / SocialTag Electromagnetism Clock signal Synchronization Electronic design Asynchronous system electronic design automation Central processing unit Synchronous circuit Clock Electronic engineering

The Design of Low-Latency Interfaces for Mixed-Timing Systems Tiberiu Chelcea and Steven M. Nowick Department of Computer Science Columbia UniversityAdd to Reading List