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Parallel
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#	Item
861	DUCC Installation and Verification Excerpt From Complete DUCC Documentation Written and maintained by the Apache UIMATM Development Community c 2012 The Apache Software Foundation Add to Reading List Source URL: uima.apache.org Language: English - Date: 2016-08-08 15:58:33 Software System software Computer architecture System administration Superuser Cgroups Home directory Privilege IBM General Parallel File System Arch Linux File system Apache Maven
862	Structuring the execution of OpenMP applications for multicore architectures Fran¸cois Broquedis, Olivier Aumage, Brice Goglin, Samuel Thibault, Pierre-Andr´e Wacrenier, Raymond Namyst To cite this version: Add to Reading List Source URL: hal.inria.fr Language: English - Date: 2016-06-15 17:47:10 Computing Parallel computing Computer programming OpenMP Thread Scheduling Work stealing Multithreading Cache memory Multi-core processor Cilk Automatic parallelization
863	Spark: Cluster Computing with Working Sets Matei Zaharia, Mosharaf Chowdhury, Michael J. Franklin, Scott Shenker, Ion Stoica University of California, Berkeley Abstract MapReduce/Dryad job, each job must reload the data Add to Reading List Source URL: people.csail.mit.edu Language: English - Date: 2016-08-21 15:09:53 Computing Hadoop Apache Software Foundation Parallel computing Cluster computing Java platform Apache Spark MapReduce Data-intensive computing Apache Hadoop Apache Hive Scala
864	Transactor-based debugging of massively parallel processor array architectures Markus Blocherer, Srinivas Boppu, Vahid Lari, Frank Hannig, Jürgen Teich Hardware/Software Co-Design University of Erlangen-Nuremberg Add to Reading List Source URL: www.mad-workshop.de Language: English - Date: 2016-03-22 12:43:37 Computing Computer architecture Electronic engineering VHDL ModelSim Field-programmable gate array ARC Synopsys Router
865	Design of Parallel and High-Performance Computing Fall 2014 Lecture: Memory Models Motivational video: https://www.youtube.com/watch?v=tW2hT0g4OUs Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-10-04 17:36:16 Computing Concurrent computing Computer architecture Cache coherency Parallel computing Transaction processing Computer memory Cache coherence MESI protocol Sequential consistency Consistency model Cache
866	MONFISPOL Grant no.: DeliverableBeta-version of parallel routines: user manual. Marco Ratto, European Commission, Joint Research Centre Ivano Azzini, Houtan Bastani, Sebastien Villemot, DYNARE Team July 8, Add to Reading List Source URL: www.monfispol.eu Language: English - Date: 2011-11-16 08:02:14 Software Computing Parallel computing Array programming languages Cross-platform software Computer cluster Concurrent computing Command-line interface Operating system Filter MATLAB GNU Octave
867	MIAOW: An Open Source GPGPU www.miaowgpu.org Vinay Gangadhar, Raghu Balasubramanian, Mario Drumond, Ziliang Guo, Jai Menon, Cherin Joseph, Robin Prakash, Sharath Prasad, Pradip Vallathol, Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2015-09-04 22:55:07 Computing Computer architecture GPGPU Parallel computing Graphics hardware Computer engineering Computational science General-purpose computing on graphics processing units OpenCores Open-source hardware Graphics processing unit Meow
868	Algorithmic Improvements for Dense Symmetric Tridiagonalization Grey Ballard EPASA 2015 International Workshop on Eigenvalue Problems: Algorithms, Software, and Applications Add to Reading List Source URL: www.sandia.gov Language: English - Date: 2015-09-19 08:33:27 Algebra Linear algebra Mathematics Sparse matrices Numerical linear algebra Matrix theory Tridiagonal matrix Matrices Eigenvalues and eigenvectors Parallel computing Band matrix Symmetric matrix
869	More synchronization mechanisms • DEADLOCK • READERS/WRITER LOCKS • CONDITION VARIABLES Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-11-24 06:37:50 Concurrency control Computing Computer programming Concurrency Software engineering Synchronization Lock File locking Monitor Parallel computing Deadlock Hash table
870	A PCIe Congestion-Aware Performance Model for Densely Populated Accelerator Servers Maxime Martinasso∗ , Grzegorz Kwasniewski† , Sadaf R. Alam∗ , Thomas C. Schulthess∗‡§ , Torsten Hoefler† ∗ Swiss Nationa Add to Reading List Source URL: htor.inf.ethz.ch Language: English - Date: 2016-08-10 18:43:51 Computing Computer architecture Peripheral Component Interconnect Computer hardware GPGPU Standards organizations Parallel computing Video cards PCI Express Nvidia Tesla PLX Technology Transmission Control Protocol

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