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Microprocessors
Results: 844

#	Item
331	Rebound: Scalable Checkpointing for Coherent Shared Memory Rishi Agarwal, Pranav Garg, and Josep Torrellas University of Illinois at Urbana-Champaign, USA {agarwa29,garg11,torrella}@illinois.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2011-04-01 11:24:25 Central processing unit Microprocessors Application checkpointing Computer memory Parallel computing CPU cache Multi-core processor AMD 10h Microarchitecture Computer architecture Computer hardware Computing
332	Bulk Disambiguation of Speculative Threads in Multiprocessors∗ Luis Ceze, James Tuck, C˘alin Cas¸caval† and Josep Torrellas University of Illinois at Urbana-Champaign {luisceze, jtuck, torrellas}@cs.uiuc.edu http:/ Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2006-04-04 17:00:54 Computing Microprocessors Threads Parallel computing CPU cache Computer memory Multithreading Microarchitecture Threading Computer hardware Computer architecture Central processing unit
333	Digital Semiconductor Alpha[removed]and Alpha 21064A Microprocessors Hardware Reference Manual Order Number: EC–Q9ZUC–TE Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:01:58 Computing Alpha 21064 Computer memory DEC Alpha PALcode CPU cache Instruction set Alpha 21164 Computer architecture Computer hardware Central processing unit
334	Theme Feature . A Single-Chip Multiprocessor Add to Reading List Source URL: www-hydra.stanford.edu Language: English - Date: 1998-03-07 07:33:31 Parallel computing Central processing unit Microprocessors Threads Simultaneous multithreading Superscalar Multithreading Microarchitecture Multi-core processor Computing Computer architecture Computer hardware
335	Architectural Support for Scalable Speculative Parallelization in Shared-Memory Multiprocessors Marcelo Cintra, Jose´ F. Mart´ınez, and Josep Torrellas Department of Computer Science University of Illinois at Urbana-C Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-27 12:21:04 Central processing unit Microprocessors CPU cache Cache Computer memory Parallel computing Microarchitecture Memory disambiguation Data structure alignment Computer hardware Computer architecture Computing
336	Irregular Parallel Algorithms Department of Computer Science University of North Carolina at Chapel Hill The Challenge Add to Reading List Source URL: www.cs.unc.edu Language: English - Date: 2009-07-27 07:28:56 Software engineering Array programming languages Threads Microprocessors Chapel Data parallelism Fortran Unified Parallel C Multithreading Computing Computer programming Parallel computing
337	CxO InSights ™ Trends in information technology from the technologists at Digitask Consultants October 13, 2003 Add to Reading List Source URL: www.digitask.com Language: English - Date: 2010-06-14 08:14:46 Microprocessors Instruction set architectures Microcomputers Telecommunications engineering Operating system Itanium Chipset Server Digital Equipment Corporation Computer hardware Computer architecture Computing
338	CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction Luis Ceze, Karin Strauss, James Tuck, Jose Renau† and Josep Torrellas University of Illinois at Urbana-Champaign {luisceze, kstrauss, jtuck, torrellas}@c Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2004-12-21 00:54:20 Central processing unit Runahead CPU cache Microprocessors Branch predictor Memory-level parallelism Microarchitecture Instruction window Hardware scout Computer architecture Computer hardware Computer engineering
339	Alpha Microprocessors SROM Mini-Debugger User’s Guide Order Number: EC–QHUXD–TE Revision/Update Information: Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:04:29 Debuggers Assemblers Personal computers Computing platforms Tru64 UNIX DEC Alpha Digital Equipment Corporation Debugging Motherboard Computing Computer architecture Software
340	Illusionist: Transforming Lightweight Cores into Aggressive Cores on Demand Amin Ansari University of Illinois [removed] Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-01-25 16:46:06 Central processing unit Microprocessors Instruction set architectures Parallel computing DEC Alpha CPU cache Branch predictor Multithreading ARM architecture Computer architecture Computer hardware Computing

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