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Microprocessors
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#	Item
291	Profiling R on a Contemporary Processor Shriram Sridharan Jignesh M. Patel University of Wisconsin–Madison Add to Reading List Source URL: www.vldb.org Language: English - Date: 2014-09-10 18:02:40 Central processing unit Computer memory Microprocessors CPU cache Cache Compiler optimization Garbage collection Microarchitecture Thrashing Computer architecture Computer hardware Computing
292	Microsoft PowerPoint - HC18.620.S6T2.The MIPS32� 34KŽ Processor - Ultimate Design Flexibility for Embedded Applications.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:53:34 Parallel computing Computer engineering Central processing unit Threads MIPS architecture MIPS Technologies Multithreading Multi-core processor Ring Computer architecture Computing Microprocessors
293	™ The SB-1 Core: TM A High Performance, Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:38:17 Central processing unit Instruction set architectures Microprocessors MIPS architecture CPU cache Microarchitecture Classic RISC pipeline Computer architecture Computer hardware Computer engineering
294	HC17.S5T2 The Design and Implementation of the TRIPS Prototype Chip.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:47:27 Central processing unit Microprocessors Computer memory Explicit Data Graph Execution CPU cache Instruction set Microarchitecture Simultaneous multithreading MIPS architecture Computer architecture Computer hardware Computer engineering
295	Last One Out, Turn Off The Lights Embedded Linux Conference 2015 Geert Uytterhoeven [removed] Glider bvba Add to Reading List Source URL: events.linuxfoundation.org Language: English - Date: 2015-03-27 11:40:19 Device driver Embedded microprocessors Power Architecture Computing Cross-platform software Linux
296	Performance Effects of a Cache Miss Handling Architecture in a Multi-core Processor Magnus Jahre Lasse Natvig Department of Computer and Information Science (IDI), NTNU {jahre,lasse}@idi.ntnu.no Add to Reading List Source URL: www.nik.no Language: English - Date: 2007-10-10 07:11:28 Central processing unit Cache CPU cache Microprocessors Memory hierarchy Multi-core processor Computer hardware Computer memory Computing
297	Heterogeneous Multi-Core Architecture Support for Dronecode Mark Charlebois, March 24th 2015 © 2015 Qualcomm Technologies, Inc. All rights reserved. Add to Reading List Source URL: events.linuxfoundation.org Language: English - Date: 2015-03-26 01:29:37 Embedded microprocessors Electronics Fabless semiconductor companies Beretta Px4 Storm Snapdragon Qualcomm Multi-core processor Computer hardware Computing ARM architecture
298	Performance Characteristics of the i960 CA SuperScalar Microprocessor s. McGeady Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:01 Classes of computers Central processing unit Microprocessors Parallel computing Superscalar Intel i960 Microarchitecture Reduced instruction set computing CPU cache Computer hardware Computing Computer architecture
299	Ubicom Strawman Framework Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-08-12 00:06:14 Central processing unit Microcontrollers Parallel computing Threads Microprocessors CPU cache Multithreading Parallax Propeller ETRAX CRIS Computer architecture Computing Computer hardware
300	Programming the FlexRAM ∗ Parallel Intelligent Memory System Basilio B. Fraguela Jose Renau† Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2003-04-16 22:38:29 Computer architecture Central processing unit Microprocessors CPU cache Computer memory OpenMP Microarchitecture Stream processing TRIPS architecture Computing Computer hardware Parallel computing

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