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Microarchitecture
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#	Item
121	The ARM10 Family of Advanced Microprocessor Cores Stephen Hill ARM Austin Design Center THE ARCHITECTURE FOR THE DIGITAL WORLD Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:38:56 Computer engineering CPU cache ARM9 ARM architecture Microarchitecture Instruction set Classic RISC pipeline R8000 Computer architecture Computer hardware Central processing unit
122	HC17.S5T2 The Design and Implementation of the TRIPS Prototype Chip.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:47:27 Central processing unit Microprocessors Computer memory Explicit Data Graph Execution CPU cache Instruction set Microarchitecture Simultaneous multithreading MIPS architecture Computer architecture Computer hardware Computer engineering
123	Performance Characteristics of the i960 CA SuperScalar Microprocessor s. McGeady Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:01 Classes of computers Central processing unit Microprocessors Parallel computing Superscalar Intel i960 Microarchitecture Reduced instruction set computing CPU cache Computer hardware Computing Computer architecture
124	Programming the FlexRAM ∗ Parallel Intelligent Memory System Basilio B. Fraguela Jose Renau† Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2003-04-16 22:38:29 Computer architecture Central processing unit Microprocessors CPU cache Computer memory OpenMP Microarchitecture Stream processing TRIPS architecture Computing Computer hardware Parallel computing
125	Microsoft PowerPoint - Arch1 Add to Reading List Source URL: www.ee.ic.ac.uk Language: English - Date: 2001-10-07 11:04:58 Central processing unit Microprocessors Digital electronics Microarchitecture Instruction set Computer Empire Earth II Intel 80386 Computer hardware Computer architecture Computing
126	The HP PA-8000 RISC CPU A High Performance Out-of-Order Processor Ashok Kumar Hot Chips VIII Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:47:33 Central processing unit Instruction set architectures PA-8000 Microprocessors PA-RISC Reduced instruction set computing CPU cache Microarchitecture Runway bus Computer architecture Computer hardware Computing
127	Microsoft PowerPoint - Hotchips99 Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:49:49 Central processing unit Parallel computing Classes of computers Microprocessors Very long instruction word Sun Microsystems Microarchitecture MAJC Instruction set Computer architecture Computing Computer hardware
128	Netburst Microarchitecture Overview Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:40:02 Computing Intel Core NetBurst P6 P5 CPU cache Pentium Intel Microarchitecture Computer hardware Computer architecture Central processing unit
129	Specific details purposefully withheld due to sensitivity issues Microprocessors for Roots-of-Trust Kristopher Carver Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-08-15 18:28:34 IBM PC compatibles Central processing unit Microarchitecture Microprocessors Embedded system Computer buses Industry Standard Architecture Computer architecture Computer hardware Computer engineering
130	ENERGY-EFFICIENT THREAD-LEVEL SPECULATION CHIP MULTIPROCESSORS WITH THREAD-LEVEL SPECULATION HAVE BECOME THE SUBJECT OF INTENSE RESEARCH. THIS WORK REFUTES THE CLAIM THAT SUCH A DESIGN IS NECESSARILY TOO ENERGY INEFFICIE Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2006-02-09 23:08:49 Computing CPU cache Cache Microarchitecture Parallel computing AMD 10h Compiler optimization Central processing unit Computer hardware Computer architecture

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