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Microarchitecture
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#	Item
101	The 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012 Kernel Weaver: Automatically Fusing Database Primitives for Efficient GPU Computation Haicheng Wu Gregory Diamos Add to Reading List Source URL: www.gdiamos.net Language: English - Date: 2012-11-05 15:15:42 Graphics hardware Computer architecture Nvidia Video cards Kernel Thread Parallel Thread Execution CUDA OpenCL Computing GPGPU Computer hardware
102	Partial Evaluation for Scientic Computing: The Supercomputer Toolkit Experience Andrew A. Berlin Xerox Palo Alto Research Center Rajeev J. Surati Add to Reading List Source URL: repository.readscheme.org Language: English - Date: 2010-10-22 08:06:08 Parallel computing Automatic parallelization Very long instruction word Cell Microarchitecture Supercomputer Program optimization 64-bit Central processing unit Computing Concurrent computing Computer programming
103	AMX™ Timing Guide and Data for AMX PPC32 Multitasking Executive First Printing: June 1, 1996 Add to Reading List Source URL: www.kadak.com Language: English - Date: 2002-11-01 16:06:00 Computing Computer memory AMC AMX Coupes CPU cache Instruction set Superscalar Microarchitecture Computer hardware Computer architecture Central processing unit
104	AMX™ Timing Guide and Data for AMX 86 Multitasking Executive First Printing: April 2, 2001 Add to Reading List Source URL: www.kadak.com Language: English - Date: 2005-03-01 18:08:00 Central processing unit Classes of computers Computer memory AMC AMX Coupes CPU cache Microarchitecture Instruction set Cache Computer hardware Computer architecture Computing
105	AMX™ Timing Guide and Data for AMX CFire Multitasking Executive First Printing: June 1, 1999 Add to Reading List Source URL: www.kadak.com Language: English - Date: 2002-11-01 16:04:00 Computing Classes of computers Computer memory AMC AMX Coupes CPU cache Instruction set Superscalar Microarchitecture Computer hardware Computer architecture Central processing unit
106	AMX™ Timing Guide and Data for AMX 386/ET Multitasking Executive First Printing: Add to Reading List Source URL: www.kadak.com Language: English - Date: 2002-11-01 18:01:00 Computing Computer memory AMC AMX Coupes CPU cache Instruction set Superscalar Microarchitecture Computer hardware Computer architecture Central processing unit
107	Bulk Disambiguation of Speculative Threads in Multiprocessors Luis Ceze, University of Washington sa pa Add to Reading List Source URL: www.nii.ac.jp Language: English - Date: 2010-01-12 02:04:57 Concurrent computing Parallel computing Linearizability Consistency model Thread Concurrency Scalability Microarchitecture Weak consistency Computing Transaction processing Computer architecture
108	The Au1000 Internet Edge Processor: TM A High Performance, Low Power SOC The First Chip in a Family of Parts from Alchemy Semiconductor, Inc. Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:37:56 Central processing unit Computer memory Instruction set architectures Microprocessors CPU cache Cache MIPS architecture Microarchitecture Cell Computer architecture Computer hardware Computer engineering
109	Using a User-Level Memory Thread for Correlation Prefetching Yan Solihin Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-27 00:49:37 Computer architecture Central processing unit Microprocessors CPU cache Cache Prefetcher Memory hierarchy NForce Microarchitecture Computer hardware Computing Computer memory
110	c 2014 Aditya Agrawal REFRESH REDUCTION IN DYNAMIC MEMORIES BY Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2014-12-18 00:19:39 EDRAM Dynamic random-access memory Memory refresh CPU cache AMD 10h Memory hierarchy Random-access memory Microarchitecture Computer memory Computer hardware Computing

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