A Framework for Enhancing Data Reuse via Associative Reordering Kevin Stock1 Louis-No¨el Pouchet3 1

Source URL: www.grosser.es

• Software engineering
• Computer programming
• Compiler optimizations
• Computing
• Stencil code
• Loop optimization
• For loop
• Polytope model
• Optimizing compiler
• OpenMP
• Loop unrolling
• Foreach loop

Diamond SciSoft Analysis Developer Guide Release 1.0 Diamond Light Source, Scientific Software Team

Source URL: www.opengda.org

• Software engineering
• Computer programming
• Computing
• Concurrent programming languages
• Object-oriented programming languages
• Cross-platform software
• Java
• Iterator
• Foreach loop

SYNCRO Univeral Platform for Locking Applications The modular design of the new locking electronics allows us to configure the phase lock loop for various locking tasks. Developed to serve in our optical

Source URL: www.menlosystems.com

Defensive Loop Tiling for Multi-core Processors Bin Bao(包斌), Xiaoya Xiang(向晓娅) University of Rochester Presented by: Chen Ding(丁晨)

Source URL: safari.ece.cmu.edu

W07 February 10th, 2014 Love each other! Stay in the loop:

Source URL: uid.umu.se

Thermal Probe Nanolithography: closed-loop, high-speed, high-resolution, 3D Felix Holzner a,b,c , Philip Paul

Source URL: www.physics.mcgill.ca

ROBOTC Reference While Loops with Natural Language A while loop is a structure within ROBOTC which allows a section of code to be repeated

Source URL: cdn.robotc.net

Better Tiling and Array Contraction for Compiling Scientific Programs ∗ Geoff Pike and Paul N. Hilfinger Computer Science Division University of California at Berkeley {pike,hilfinger}@cs.berkeley.edu

Source URL: titanium.cs.berkeley.edu

• Compiler optimizations
• Compiler construction
• Optimizing compiler
• Programming language implementation
• Foreach loop
• Aliasing
• Automatic parallelization
• GNU Compiler Collection
• Loop tiling

JDK 8: Stream Style Сергей Куксенко , @kuksenk0 The following is intended to outline our general

Source URL: 2013.jokerconf.com

• Software engineering
• Computer programming
• Control flow
• Foreach loop
• Programming language theory

Throughput-Constrained Voltage and Frequency Scaling for Real-time Heterogeneous Multiprocessors Pengcheng Huang Orlando Moreira

Source URL: www.tik.ethz.ch

• Operations research
• Engineering
• Electronic engineering
• Electrical engineering
• Parallel computing
• Mathematical optimization
• Algorithm
• Throughput
• Phase-locked loop
• Scheduling
• Unfolding
• Integer programming