Abstracting Vector Architectures in Library Generators: Case Study Convolution Filters Alen Stojanov† † Georg Ofenbeck†

Source URL: spiral.ece.cmu.edu

• Array programming
• Generic programming
• Fourier transform
• Computer programming
• Analysis
• Software engineering
• Loop tiling
• Multidimensional DSP with GPU Acceleration

Tiling-harmonic functions Project report Faculty mentor: Sergiy Merenkov Graduate student mentor: Vyron Vellis Team: Yilun Du, Qing Ma, Sufei Zhang May 9, 2014

Source URL: www.math.illinois.edu

• Tessellation
• Geometry
• Self-dual tilings
• Polyhedra
• Honeycombs
• Harmonic function
• Square
• Stochastic processes
• Loop-erased random walk
• Wythoff symbol

CS:APP2e Web Aside MEM:BLOCKING: Using Blocking to Increase Temporal Locality∗ Randal E. Bryant David R. O’Hallaron June 5, 2012

Source URL: csapp.cs.cmu.edu

• Compiler optimizations
• Numerical linear algebra
• Cache
• Computer memory
• Locality of reference
• Software optimization
• Matrix multiplication
• Loop optimization
• Matrix
• Array data type
• Loop nest optimization
• Loop tiling

Multi-Agent Ad Hoc Team Partitioning by Observing and Modeling Single-Agent Performance Etkin Baris Ozgul∗ , Somchaya Liemhetcharat† , and Kian Hsiang Low∗ ∗ Department of Computer Science, National University o

Source URL: somchaya.org

• NP-complete problems
• Partition problem
• Partition
• Reinforcement learning
• Algorithm
• Agent-based model
• Multi-agent system
• Graph partition
• Loop tiling

On the Scalability of Loop Tiling Techniques David G. Wonnacott Haverford College Haverford, PA, U.S.AMichelle Mills Strout

Source URL: impact.gforge.inria.fr

Defensive Loop Tiling for Multi-core Processors Bin Bao(包斌), Xiaoya Xiang(向晓娅) University of Rochester Presented by: Chen Ding(丁晨)

Source URL: safari.ece.cmu.edu

Better Tiling and Array Contraction for Compiling Scientific Programs ∗ Geoff Pike and Paul N. Hilfinger Computer Science Division University of California at Berkeley {pike,hilfinger}@cs.berkeley.edu

Source URL: titanium.cs.berkeley.edu

• Compiler optimizations
• Compiler construction
• Optimizing compiler
• Programming language implementation
• Foreach loop
• Aliasing
• Automatic parallelization
• GNU Compiler Collection
• Loop tiling

Minimizing Completion Time for Loop Tiling with Computation and Communication Overlapping

Source URL: www.cslab.ntua.gr

In Search of Near-Optimal Optimization Phase Orderings Jack W. Davidson Prasad A. Kulkarni David B. Whalley Gary S. Tyson

Source URL: www.cs.fsu.edu

• Programming language implementation
• Mathematical optimization
• Computer performance
• Software optimization
• Program optimization
• Inline expansion
• Genetic algorithm
• Algorithm
• Loop tiling
• Computing
• Software
• Compiler optimizations

The Cache Performance of Blocked Monica S. Lam,

Source URL: suif.stanford.edu

• Computer hardware
• Compiler optimizations
• CPU cache
• Central processing unit
• Data
• Memory hierarchy
• Cache-oblivious algorithm
• Loop tiling
• Cache
• Computer memory
• Computing