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CoreConnect
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1	Building the IP Ecosystem by Thomas Harms The term System-on-a-Chip (SoC) defines both a product and a process. As a product, SoC defines specific, targeted applications and contains an entire system. An SoC product will Add to Reading List Source URL: www.steinwrites.com Language: English - Date: 2009-03-19 17:34:19 Computer architecture Electronic engineering Electronics System on a chip Instruction set architectures Electronic design Integrated circuits Computer buses Reuse CoreConnect ARC Application-specific integrated circuit
2	GIO BUS SPECIFICATION version 1.1 (draft) 7April[removed]Silicon Graphics Add to Reading List Source URL: download.majix.org Language: English - Date: 2013-01-10 05:04:40 GIO Conventional PCI Endianness CoreConnect Computer buses Computer hardware Computing
3	Extending the Transaction Level Modeling Approach for Fast Communication Architecture Exploration Add to Reading List Source URL: www.engr.colostate.edu Language: English - Date: 2004-06-11 02:36:08 Computer buses Transaction-level modeling SystemC Advanced Microcontroller Bus Architecture System on a chip Electronic system-level design and verification CoreConnect High-level synthesis Modeling language Electronic engineering Electronic design automation Digital electronics
4	Xilinx XAPP967 Creating an OPB IPIF-based IP and Using it in EDK Add to Reading List Source URL: www.xilinx.com Language: English - Date: 2013-03-04 06:14:09 MicroBlaze Embedded systems Xilinx Field-programmable gate array Oregon Public Broadcasting Universal asynchronous receiver/transmitter Joint Test Action Group CoreConnect Electronic engineering Electronics Television in the United States
5	PDF Document Add to Reading List Source URL: vswww.kaist.ac.kr Language: English - Date: 2005-09-10 02:35:57 Design Virtual Socket Interface Alliance CoreConnect System on a chip Advanced Microcontroller Bus Architecture Wishbone Embedded system Platform-based design Expansion card Computer buses Electronic engineering Electronics
6	PDF Document Add to Reading List Source URL: opencores.org Language: English - Date: 2011-06-07 09:12:49 Electronic engineering Wishbone Advanced Microcontroller Bus Architecture CoreConnect Conventional PCI OpenCores System bus Bus Device control register Computer buses Computer hardware Electronics
7	PDF Document Add to Reading List Source URL: cdn.opencores.org Language: English - Date: 2011-06-07 09:12:49 Electronic engineering Wishbone Advanced Microcontroller Bus Architecture CoreConnect Conventional PCI OpenCores System bus Bus Device control register Computer buses Computer hardware Electronics