Bluespec

Results: 11



#Item
1experienced in the software domain. For example, the notion of a variable in software often becomes a wire in hardware with very different semantics. Hardware, at least synchronous anyway, has the notion of a clock and o

experienced in the software domain. For example, the notion of a variable in software often becomes a wire in hardware with very different semantics. Hardware, at least synchronous anyway, has the notion of a clock and o

Add to Reading List

Source URL: rodin.cs.ncl.ac.uk

Language: English - Date: 2006-08-22 04:59:46
2OMAR CHOUDARY, ADVANCED COMPUTER DESIGN, APRILFrom Verilog to Bluespec: Tales of an AES Implementation for FPGAs

OMAR CHOUDARY, ADVANCED COMPUTER DESIGN, APRILFrom Verilog to Bluespec: Tales of an AES Implementation for FPGAs

Add to Reading List

Source URL: www.cl.cam.ac.uk

- Date: 2010-04-27 13:41:47
    3Why formal verification remains on the fringes of commercial development Arvind Computer Science & Artificial Intelligence Laboratory Massachusetts Institute of Technology

    Why formal verification remains on the fringes of commercial development Arvind Computer Science & Artificial Intelligence Laboratory Massachusetts Institute of Technology

    Add to Reading List

    Source URL: www.fm2008.abo.fi

    Language: English - Date: 2008-06-04 08:51:50
    4Microsoft Word - FM08 Tutorial.doc

    Microsoft Word - FM08 Tutorial.doc

    Add to Reading List

    Source URL: www.fm2008.abo.fi

    Language: English - Date: 2008-04-01 03:28:00
    5ICFP 2008 Final Program  Monday, Sep 22, 2008 Invited Talk (Chair: Peter Thiemann) 9:00 Lazy and Speculative Execution in Computer Systems Butler Lampson; Microsoft Research

    ICFP 2008 Final Program Monday, Sep 22, 2008 Invited Talk (Chair: Peter Thiemann) 9:00 Lazy and Speculative Execution in Computer Systems Butler Lampson; Microsoft Research

    Add to Reading List

    Source URL: www.icfpconference.org

    Language: English - Date: 2009-06-10 17:01:37
    6Bluespec Extensible RISC Implementation: BERI Software reference

    Bluespec Extensible RISC Implementation: BERI Software reference

    Add to Reading List

    Source URL: www.cl.cam.ac.uk

    Language: English - Date: 2015-04-14 11:24:01
    7Bluespec Extensible RISC Implementation: BERI Hardware reference

    Bluespec Extensible RISC Implementation: BERI Hardware reference

    Add to Reading List

    Source URL: www.cl.cam.ac.uk

    Language: English - Date: 2015-04-14 11:22:52
    8CTSRD	
  Project	
  Briefing	
   Robert	
  N.	
  M.	
  Watson	
  (Cambridge)	
   Peter	
  G.	
  Neumann	
  (SRI)	
  	
  	
  	
  	
  	
  	
  Simon	
  W.	
  Moore	
  (Cambridge)	
     DARPA	
  CRAS

    CTSRD  Project  Briefing   Robert  N.  M.  Watson  (Cambridge)   Peter  G.  Neumann  (SRI)              Simon  W.  Moore  (Cambridge)     DARPA  CRAS

    Add to Reading List

    Source URL: www.csl.sri.com

    Language: English - Date: 2014-12-11 17:47:38
    9Bluespec Extensible RISC Implementation: BERI Hardware reference

    Bluespec Extensible RISC Implementation: BERI Hardware reference

    Add to Reading List

    Source URL: www.cl.cam.ac.uk

    Language: English - Date: 2014-07-14 10:37:05
    10FPGA-­‐based	
  design	
  of	
  a	
  	
   Million	
  point	
  Sparse	
  FFT	
   Abhinav	
  Agarwal	
  ([removed])	
   Computer	
  Science	
  and	
  ArCficial	
  Intelligence	
  Laboratory	
   M

    FPGA-­‐based  design  of  a     Million  point  Sparse  FFT   Abhinav  Agarwal  ([removed])   Computer  Science  and  ArCficial  Intelligence  Laboratory   M

    Add to Reading List

    Source URL: groups.csail.mit.edu

    Language: English - Date: 2013-02-19 20:14:09