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Software / Application programming interfaces / Profilers / Compiler optimizations / Fortran / OpenMP / VTune / Multi-core processor / Coprocessor / Computing / Computer programming / Parallel computing


Programming and Optimization with Intel Xeon Phi Coprocessors Colfax Developer Training Four-day Workshop CDT 401
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Document Date: 2015-06-01 03:04:00


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File Size: 669,71 KB

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Colfax International / Intel / /

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Russia / /

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Facility

Stanford University / Intel Math Kernel Library / North Carolina State University / Ioffe Institute / University of California / /

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larger applications / parallel applications / scientific applications / interconnect technologies / parallel algorithms / hardware solutions / free energy / family processors / online resource / diagnostic tools / business Web / parallel computing platforms / data mining / mining / recursive cache-oblivious algorithm / scientific computing / software development / /

Organization

Stanford University / University of California / Berkeley / North Carolina State University / Ioffe Institute / /

Person

Ryo Asai / Vadim Karpusenko / Andrey Vladimirov / /

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author / Collector / Principal HPC Research Engineer / Researcher / co-author / Head / programmer / /

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California / /

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Stanford University / /

Technology

Ethernet / load balancing / fluid dynamics / data mining / Xeon family processors / simulation / shared memory / optimization methods for scientific applications / recursive cache-oblivious algorithm / /

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http /

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