Back to Results
First PageMeta Content
Central processing unit / Computer memory / Virtual memory / CPU cache / Cache / Threads / Memory management unit / Multithreading / Translation lookaside buffer / Computer hardware / Computing / Computer architecture


A Multi-threaded 64 Bit PowerPC Commercial RISC Processor IBM Server Group Rochester, MN
Add to Reading List

Document Date: 2013-07-27 22:49:02

Open Document

File Size: 65,13 KB

Share Result on Facebook

City

Rochester / /

Company

IBM / HP / /

/

Facility

Commercial Overview CPI Breakdown L2 Miss Processor Overview Pipeline / /

MusicGroup

Power / /

NaturalFeature

MT MT / Pulsar Performance Improvement MT / /

Organization

Load Store Unit / Branch Unit / Simple Integer Unit / Simple & Complex Integer Unit / Memory Management Unit / /

Person

Ronald N. Kalla Steven / Salvatore N. Storino John / Steven R. Kunkel / /

/

Position

Pulsar MP / task domination Forward / /

Product

M-16 / /

ProgrammingLanguage

FP / /

Technology

Alpha / 5-Al Bulk Frequency MPs Cache Size L2 Peak BW Mem Peak BW Mem Bus Ratio Max Memory Chip Size Power Transistors Technology / 10 1 2 4 8 Processor / 6-Cu Bulk Processor / 8 01/98 Processor / CMP / /

SocialTag