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SystemC / Transaction-level modeling / Electronic design / Electronic system-level design and verification / High-level synthesis / Field-programmable gate array / System on a chip / Modeling language / Verilog / Electronic engineering / Electronic design automation / Hardware description languages
Date: 2012-08-16 13:49:13
SystemC
Transaction-level modeling
Electronic design
Electronic system-level design and verification
High-level synthesis
Field-programmable gate array
System on a chip
Modeling language
Verilog
Electronic engineering
Electronic design automation
Hardware description languages

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