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Towles
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1	Throughput-Centric Routing Algorithm Design ∗ Brian Towles, William J. Dally, and Stephen Boyd Department of Electrical Engineering Stanford University {btowles,billd}@cva.stanford.edu Add to Reading List Source URL: cva.stanford.edu Language: English
2	A Gentleman in Moscow Author Website: http://www.amortowles.com/ Youtube Author Discussion with Amor Towles regarding A Gentleman in Moscow: https://www.youtube.com/watch?v=blabUbWI_Ao New York Times Book Review: https:/ Add to Reading List Source URL: www.montcolibraries.org - Date: 2018-01-24 13:46:24
3	ENG I & II Tutorials (After school, each teacher in his/her own classroom) Date: 03/02 Date: Date: 03/04 Add to Reading List Source URL: d39smchmfovhlz.cloudfront.net Language: English - Date: 2015-07-01 21:09:41 Towles C110
4	Worst-case Traffic for Oblivious Routing Functions Brian Towles and William J. Dally Department of Electrical Engineering Stanford University {btowles,billd}@cva.stanford.edu Abstract— This paper presents an algorithm Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Routing Routing protocols Internet Routing algorithms Computing Network performance Network architecture Throughput
5	Scalable Opto-Electronic Network (SOENet) Amit K. Gupta, William J. Dally, Arjun Singh, and Brian Towles Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Electronics Switched fabric Fat tree InfiniBand Routing Topology Ethernet Clos network Node Network topology Computing Network architecture
6	Route Packets, Not Wires: On-Chip Interconnection Networks William J. Dally and Brian Towles Computer Systems Laboratory Stanford University Stanford, CA 94305 {billd,btowles}@cva.stanford.edu Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Computer networking Computer memory Ethernet Network switch Content-addressable memory Cell Wormhole switching Network On Chip Computing Electronic engineering Electronics
7	Guaranteed Scheduling for Switches with Configuration Overhead Brian Towles and William J. Dally Abstract— In this paper we present three algorithms that provide performance guarantees for scheduling switches, such as Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Switches Analysis of algorithms Scheduling algorithms Computational complexity theory Scheduling Speedup Time complexity Graph coloring Crossbar switch Theoretical computer science Applied mathematics Mathematics
8	Globally Adaptive Load-Balanced Routing on Tori Arjun Singh, William J Dally, Brian Towles, and Amit K Gupta Computer Systems Laboratory, Stanford University arjuns, billd, agupta, btowles@cva.stanford.edu Abstract— Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Throughput Routing Parallel algorithm Non-blocking algorithm Concurrent computing Network performance Computing
9	GOAL: A Load-Balanced Adaptive Routing Algorithm for Torus Networks ∗ Arjun Singh , William J Dally , Amit K Gupta , Brian Towles Computer Systems Laboratory Stanford University {arjuns, billd, agupta, btowles}@cva.sta Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Throughput Routing Latency Shortest path problem Computing Theoretical computer science Network performance Mathematics
10	Adaptive Channel Queue Routing on k-ary n-cubes ∗ Arjun Singh , William J Dally , Amit K Gupta , Brian Towles Computer Systems Laboratory, Add to Reading List Source URL: cva.stanford.edu Language: English - Date: 2005-12-01 13:38:04 Management Throughput Routing Network congestion Latency Low latency Transmission Control Protocol Metrics Network performance Network architecture Computing

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