Torrellas - PDFSEARCH.IO - Document Search Engine

Torrellas
Results: 158

#	Item
81	Energy Efficient Hybrid Wakeup Logic Michael Huang, Jose Renau, and Josep Torrellas University of Rochester, University of Illinois at Urbana-Champaign* Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-29 12:05:14 Science Academia Knowledge Digital electronics Register file Logic
82	Cyrus: Unintrusive Application-Level Record-Replay for Replay Parallelism Nima Honarmand, Nathan Dautenhahn, Josep Torrellas, Samuel T. King Gilles Pokam, Cristiano Pereira Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-01-25 16:44:28 Replay system Computer architecture Computing Parallel computing Thread
83	SigRace: Signature-Based Data Race Detection Abdullah Muzahid, Dario Suarez, Shanxiang Qi & Josep Torrellas Computer Science Department University of Illinois at Urbana-Champaign Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English* - Date: 2010-12-24 12:36:34 Software engineering Software bugs Concurrent computing Thread Parallel computing Lock Synchronization Race condition Debugging Concurrency Computing Computer programming
84	Cyrus: Unintrusive Application-Level Record-Replay for Replay Parallelism Nima Honarmand, Nathan Dautenhahn, Josep Torrellas and Samuel T. King (UIUC) Gilles Pokam and Cristiano Pereira (Intel) Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2013-03-29 16:27:21 P0 REPLAY Parallel computing
85	LO SECUESTRO DE YOLANT DE TORRELLAS Muy excellent senyora: La forma et manera de como son passados los negocios entre los nobles don Philip de Castro et su hermano don Joffre con Yolant de Torrellas, muller que fue de mo Add to Reading List Source URL: www.academiadelaragones.org Language: Spanish - Date: 2010-01-25 15:04:01
86	E:earcha2012_slideskcompactor-slides-final.ppt Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2012-03-20 12:04:18 Atom Honda P series Josep Torrellas Parallel computing Electronics Real-time computing Computing Technology
87	A Model for Timing Errors in Processors with Parameter Variation ∗ Smruti R. Sarangi, Brian Greskamp, and Josep Torrellas University of Illinois at Urbana-Champaign {sarangi,greskamp,torrellas}@cs.uiuc.edu http://iacom Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2007-01-31 13:57:57 Measurement Threshold voltage MOSFET Accuracy and precision Process variation Very-large-scale integration Statistics Electrical engineering Thought
88	BulkSMT: Designing SMT Processors for Atomic-Block Execution∗ Xuehai Qian, Benjamin Sahelices and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu Abstract Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2012-01-18 11:44:30 Computer architecture Central processing unit Parallel computing Microprocessors CPU cache Simultaneous multithreading Multithreading Computing Computer hardware Threads
89	Prototyping Architectural Support for Program Rollback: An Application to Software Debugging Radu Teodorescu and Josep Torrellas University of Illinois at Urbana-Champaign Several recently-proposed architectural techniqu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2005-03-04 16:59:35 Central processing unit Microprocessors Josep Torrellas Speculative execution Debugging Microarchitecture Kernel Computer program Compiler Computing Computer architecture Computer hardware
90	Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation∗ Jose Renau† James Tuck Wei Liu Luis Ceze Karin Strauss Josep Torrellas † Dept. of Computer Engineering, University of Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2005-09-06 12:30:36 Central processing unit Parallel computing Classes of computers Microprocessors Superscalar Microarchitecture Speculative multithreading SPECint Coprocessor Computing Computer hardware Computer architecture

UPDATE