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#	Item
121	Architetture avanzate e parallele Voti esame 26 giugno 2015 Cognome Nome Esonero 1 Esonero 2 parte A parte B Voto finale Cicchetti Federica Add to Reading List Source URL: twiki.di.uniroma1.it - Date: 2015-06-27 11:06:15
122	Quicksort - partizione2: il codice int partition2(int a[], int start, int end) {int pivot = a[start], i =start, j = end+1; for (;;) { /* invariante: (a[start+1],…,a[i] < =pivot)&& Add to Reading List Source URL: twiki.di.uniroma1.it - Date: 2007-05-09 08:57:03
123	Machine Learning Project Genetic Framework Un framework per l’implementazione e la visualizzazione di algoritmi genetici Add to Reading List Source URL: twiki.di.uniroma1.it Language: Italian - Date: 2015-02-05 11:10:37
124	Laboratorio di Programmazione di Rete Lezione del 12 Aprile 2010 Docente: Novella Bartolini Ricevimento: Mercoledì ore 12:30-14:00 Via Salaria 113, terzo piano, stanza 309 Add to Reading List Source URL: twiki.di.uniroma1.it Language: Italian - Date: 2010-05-11 03:39:09
125	More concurrency issues and synchronization mechanisms • DEADLOCK • READERS/WRITER LOCKS • CONDITION VARIABLES Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-11-24 06:45:41 Concurrency control Abstract data types Monitor Software design patterns Concurrency Concurrent computing Double-ended queue Queue Lock Synchronization Thread
126	Alberi binari (radicati e ordinati) Il figlio sinistro della radice La radice Add to Reading List Source URL: twiki.di.uniroma1.it Language: Italian - Date: 2006-08-22 07:22:22
127	WG14 N1840 C Floating Point Study Group Teleconference June 12, AM PDT / 12 PM EDT Phone: toll free) or Add to Reading List Source URL: www.open-std.org Language: English - Date: 2014-06-30 11:39:36 Computer arithmetic Arithmetic underflow Floating point TWiki E Agenda
128	Advanced Parallel Architecture Annalisa Massini Vector architecture 2 Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-04-28 17:33:30 Central processing unit Parallel computing Computer architecture Supercomputers Instruction set architectures Processor register Cray-1 MIPS instruction set SIMD Instruction set 64-bit computing Euclidean vector
129	Advanced Parallel Architecture Annalisa Massini GPU - Graphics Processing Units Advanced and Parallel Architectures Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-05-07 11:08:17 Parallel computing GPGPU Graphics hardware Video cards Digital signal processing CUDA Graphics processing unit OpenCL Thread SIMD General-purpose computing on graphics processing units Stream processing
130	Advanced and parallel architectures Cognome Nome Prof. A. Massini Add to Reading List Source URL: twiki.di.uniroma1.it Language: English - Date: 2015-07-14 14:33:32 Parallel computing Advanced RISC Computing MIPS instruction set Instruction pipelining Hazard

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