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SystemC
Results: 132

#	Item
91	Technical Backgrounder Pain Killers for the Fixed-Point Design Flow March 2010 Add to Reading List Source URL: www.synopsys.com Language: English Electronics Digital signal processing Computer arithmetic Primitive types Digital audio Quantization SystemC Algorithm Floating point Data types Electronic engineering Computing
92	Success Story Synopsys and STMicroelectronics Noida ST Noida Quickly Achieves Advanced Video Compression with Synphony C Compiler Add to Reading List Source URL: www.synopsys.com Language: English Synopsys Compiler SystemC CPU design Catapult C Logic synthesis Electronic engineering Electronic design automation High-level synthesis
93	Synopsys Hybrid Prototyping Solution `` Integrates Virtual and FPGA-Based Prototypes `` Start multicore SoC prototyping earlier Add to Reading List Source URL: www.synopsys.com Language: English Field-programmable gate array Synopsys SystemC Prototype Embedded system Catapult C Hardware emulation Electronic engineering Electronic design automation FPGA prototype
94	Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO Add to Reading List Source URL: www.synopsys.com Language: English Hardware verification languages Hillsboro Oregon Synopsys High-level synthesis SystemC System on a chip Logic synthesis Ricoh Electronic engineering Electronic design automation Electronic design
95	Success Story Synopsys and NXP Multicore Optimization Technology in Platform Architect Enables NXP to Analyze System-Level Performance and Reduce Cycle Time Add to Reading List Source URL: www.synopsys.com Language: English Synopsys Program optimization Infrastructure optimization NXP Semiconductors Digital Audio Broadcasting Electronic engineering Electronic design automation SystemC
96	Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO Add to Reading List Source URL: www.synopsys.com Language: English Hardware verification languages Hillsboro Oregon Synopsys High-level synthesis SystemC System on a chip Logic synthesis Ricoh Electronic engineering Electronic design automation Electronic design
97	-17 March 9, 2002 An Efficient C++ Framework for Cycle-Based Simulation J.P. Grossman Add to Reading List Source URL: www.ai.mit.edu Language: English - Date: 2002-08-16 14:55:21 Logic design SystemC Logic simulation Simulation VHDL Field-programmable gate array Verilog Integrated circuit design Parallel computing Electronic engineering Digital electronics Hardware description languages
98	Datasheet Vehicle Powernet Design Synopsys’ Saber® provides a complete design and verification solution for vehicle power networks Add to Reading List Source URL: www.synopsys.com Language: English Operations research Simulation SPICE Synopsys Reliability engineering Power network design SystemC Electronic engineering Electronic design automation Software
99	Success Story Synopsys and Ricoh Ricoh Optimizes New Multi-Function Printer SoC Architecture with Synopsys Platform Architect MCO Add to Reading List Source URL: www.synopsys.com Language: English Hardware verification languages Hillsboro Oregon Synopsys High-level synthesis SystemC System on a chip Logic synthesis Ricoh Electronic engineering Electronic design automation Electronic design
100	Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel Add to Reading List Source URL: www.synopsys.com Language: English VHDL-AMS Synopsys Reliability engineering VHDL SystemC SPICE Verilog Aerospace engineering Modeling language Electronic engineering Hardware description languages Electronic design automation

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