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City Houston / Austin / Chromium / / Company IBM / M. Rosenblum S. A. / GPU / ACM Press / AMD / Nvidia / Low Power Electronics / / Facility Castle Wolfenstein / Graphics Arch / We store / GPU pipeline / CPU pipeline / The University of Virginia Abstract In / / IndustryTerm semiconductor technology / fixed-function vertex processor / pixel-processing components / dot products / ilp processors / computer graphics hardware / software rendering system / energy-efficient design points / synchronous processors / fragment processing rate / vertex processing rate / fragment processing / software renderer / technology-dependent fraction / software rasterizer / Energy-efficiency tradeoffs / deep-submicron technologies / energy-efficiency standpoint / basic energy-efficiency tradeoffs / semiconductor technology nodes / energy-efficiency data / energy-delay product / energy savings / architecture level energy-efficiency metric / energy / real-world applications / Non-ideal device / successive technology generation / Commodity graphics hardware / data processing components / compares energy / technology nodes / energy-efficiency optimum / vertex processing / graphics processors / graphics hardware / fragment-processing rates / vertex processor / fragment processor / semiconductor technology generations / technology generations / graphics processor / energy efficiency / texture filtering hardware / Energy-efficient processor design using multiple clock domains / vertex-processing rates / branch predictor algorithms / technology node / stream processing framework / multipurpose tool / simulation infrastructure / / NaturalFeature GPU fall / Delay Streams / Chromium stream / / Organization Graphics Architectures J. W. Sheaffer / D. Luebke / and K. Skadron Department of Computer Science / University of Virginia Abstract In / Eurographics Association / / Person T. Aila / V / D. Brooks / V / Qsilver / C. J. Hughes / V / / Position small head / model / controller / cycle-timer model / / Product GeForce4 - NV17 / OpenGL / ED2 / / ProgrammingLanguage Verilog / / PublishedMedium ACM Transactions on Graphics / Computer Graphics / / Technology semiconductor / vertex processor / RAM / graphics processors / locally synchronous processors / semiconductor technology / API / fragment processor / mobile phones / deep-submicron technologies / VHDL / ATI radeon HyperZ technology / Verilog / fixed-function vertex processor / graphics processor / finite state machine / branch predictor algorithms / caching / Simulation / ilp processors / / URL http / SocialTag 
Graphics HardwareT. Akenine-Möller, M. McCool (Editors) A Flexible Simulation Framework for Graphics Architectures J. W. Sheaffer, D. Luebke, and K. Skadron Department of Computer Science, The University of Virg