Property Specification Language

Results: 9



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1

A Domain Specific Property Language For Fraud Detection To Support Agile Specification Development Aaron Calafato Christian Colombo

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Source URL: staff.um.edu.mt

- Date: 2014-04-03 02:02:03
    2Technology / Locale / HTML / Unicode / Documentation / Specification / Microsoft / Big5 / Character encoding / Computing / Technical communication / Software

    [MS-LCID]: Windows Language Code Identifier (LCID) Reference Intellectual Property Rights Notice for Open Specifications Documentation  Technical Documentation. Microsoft publishes Open Specifications documentation f

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    Source URL: download.microsoft.com

    Language: English - Date: 2014-05-02 11:20:47
    3Standards organizations / Hardware verification languages / IEEE standards / Accellera / VHDL / Property Specification Language / IEEE Standards Association / Verilog / Institute of Electrical and Electronics Engineers / Electronic engineering / Electronic design automation / Hardware description languages

    Accellera Continues to Promote Increased Electronic Design Productivity with Revised VHDL Standard Revision approval follows Accellera’s approval of VHDL API specification NAPA, Calif., Oct. 9, 2006, — Accellera, the

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    Source URL: www.research.ibm.com

    Language: English - Date: 2006-10-22 05:04:56
    4Formal methods / Hardware verification languages / Property Specification Language / Accellera / Technical communication / Verilog / Specification / Functional verification / Functional specification / Electronic design automation / Electronic engineering / Hardware description languages

    Property Specification Language Reference Manual Version 1.1 June 9, 2004

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    Source URL: www.eda-stds.org

    Language: English - Date: 2004-06-29 00:18:58
    5Computer security / Identity management / Access control / Patent law / OASIS / PERMIS / Know-how / Agreement on Trade-Related Aspects of Intellectual Property Rights / Security Assertion Markup Language / Security / XACML / Computing

    XACML Intellectual Property Control (IPC) Profile Version 1.0 OASIS Standard 19 January 2015 Specification URIs This version:

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    Source URL: docs.oasis-open.org

    Language: English - Date: 2015-01-19 12:00:00
    6Hardware verification languages / Logic design / Formal methods / Logic in computer science / Hardware Trojan / Property Specification Language / Runtime verification / SystemVerilog / Functional verification / Electronic engineering / Digital electronics / Hardware description languages

    Security Checkers: Detecting Processor Malicious Inclusions at Runtime Michael Bilzor, Ted Huffmire, Cynthia Irvine, and Tim Levin U.S. Naval Postgraduate School Abstract—To counter the growing threat of malicious sub

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    Source URL: www.cisr.us

    Language: English - Date: 2012-10-30 13:43:14
    7Hardware verification languages / Property Specification Language / SystemVerilog / VHDL / Functional verification / Verilog / OpenRISC / E / Logic simulation / Electronic engineering / Electronic design automation / Hardware description languages

    1 Evaluating Security Requirements in a General-Purpose Processor by Combining Assertion Checkers with Code Coverage Michael Bilzor∗ , Ted Huffmire† , Cynthia Irvine† , Tim Levin†

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    Source URL: www.cisr.us

    Language: English - Date: 2012-10-30 13:43:13
    8Hardware verification languages / Formal methods / Technical communication / Property Specification Language / VHDL / Accellera / Verilog / Formal verification / Specification / Electronic engineering / Electronic design automation / Hardware description languages

    Property Specification Language Reference Manual Version 1.01 April 25, 2003

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    Source URL: www.eda.org

    Language: English - Date: 2003-04-25 10:33:06
    9Electronic design automation / Logic design / Model checking / Temporal logic / VHDL / Logic simulation / Hardware verification languages / Formal methods / Property Specification Language / Electronic engineering / Digital electronics / Hardware description languages

    ON THE EFFECTIVENESS OF ASSERTION-BASED VERIFICATION IN AN INDUSTRIAL CONTEXT L.Pierre, F.Pancher, R.Suescun, J.Quévremont TIMA Laboratory, Grenoble, France

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    Source URL: lvl.info.ucl.ac.be

    Language: English - Date: 2013-10-21 02:25:05
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