<--- Back to Details
First PageDocument Content
CPU cache / Cache / Dynamic random-access memory / Memory hierarchy / Locality of reference / Static random-access memory / Random-access memory / Flash memory / Paging / Computer memory / Computer hardware / Computing
Date: 2006-05-10 17:05:26
CPU cache
Cache
Dynamic random-access memory
Memory hierarchy
Locality of reference
Static random-access memory
Random-access memory
Flash memory
Paging
Computer memory
Computer hardware
Computing

Null06[removed]

Add to Reading List

Source URL: computerscience.jbpub.com

Download Document from Source Website

File Size: 1,99 MB

Share Document on Facebook

Similar Documents

Unit 3: Architecture, the Memory Hierarchy, and Caching •  Learning Objectives (unit) •  Leverage caching to overcome the differences in performance available at different levels of the memory hierarchy.

DocID: 1v50l - View Document

Memory Hierarchy for Web Search Grant Ayers* Stanford University Jung Ho Ahn*

DocID: 1tNl9 - View Document

MASK: Redesigning the GPU Memory Hierarchy to Support Multi-Application Concurrency Rachata Ausavarungnirun1 Vance Miller2 Joshua Landgraf2 3

DocID: 1tLjk - View Document

Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings* John Mellor-Crummey†, David Whalley‡, Ken Kennedy† † Department of Computer Science, MS 132 Rice Universit

DocID: 1tKci - View Document