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Out-of-order execution / Electronics / Very long instruction word / Compiler optimization / Instruction set / Computer architecture / Assembly languages / Memory disambiguation / Delay slot / Computing / Programming language implementation / Explicitly parallel instruction computing


Code Reordering and Speculation Support for Dynamic Optimization Systems Erik M. Nystrom, Ronald D. Barnes, Matthew C. Merten, Wen-mei W. Hwu Center for Reliable and High-Performance Computing University of Illinois Urba
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Document Date: 2002-03-20 08:48:01

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File Size: 241,91 KB

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Company

Dynamic Optimization Systems / Checkpoint / IBM / Sentinel / /

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Facility

C library / When building / High-Performance Computing University of Illinois Urbana-Champaign / /

IndustryTerm

out-of-order execution processors / optimization systems / extra hardware / data-flow analysis hardware systems / software-driven hardware coprocessor optimizers / post-link reoptimization systems / /

Organization

Hot Spot Detector and Trace Generation Unit / Reliable and High-Performance Computing University of Illinois Urbana-Champaign / Wen-mei W. Hwu Center for Reliable / /

Person

Erik M. Nystrom / Ronald D. Barnes / /

Position

guard / scheduler / programmer / /

ProgrammingLanguage

C / /

PublishedMedium

the IMPACT / /

Technology

out-of-order execution processors / caching / perl / Crusoe processors / eight issue IMPACT EPIC processor / 8-issue EPIC processor / /

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