| Document Date: 2013-01-16 23:54:46 Open Document File Size: 186,46 KBShare Result on Facebook
City San Francisco / Southampton / Bristol / / Company Software Debugging Software / Embecosm Limited / Beyond Semiconductor / John Hauser / Mentor Graphics / Synopsys / Creative Commons / Open Source Software Meets Open Source Hardware / ORSoC AB / / Country United States / United Kingdom / / / Facility C++ library / Royal Institute of Technology / / IndustryTerm source tool chain / tool chain / software design / actual device / or32-linux tool chain / tool chains / transaction level hardware / bare metal applications / low-level software development / bare metal operation / or32-elf tool chain / embedded software / real-time operating systems / remote serial protocol / / OperatingSystem RTEMS / Linux / FreeRTOS / GNU / POSIX / / Organization Harvard / Design Verification Club / Free Software Foundation / ASIC / Institute of Technology / / Person Jeremy Bennett / Damjan Lampret / / Position original author / Chief Executive / engineer / GNU General Public License / Author / GNU Lesser General Public License / controller / / Product TestFloat software / Zigbee chips / Zigbee / TestFloat / / ProgrammingLanguage C / Verilog / C++ / / ProvinceOrState California / / Technology Design Verification / FPGA / Zigbee chips / LAN / chip design / Linux / JTAG / 64-bit RISC processors / Operating System / operating systems / VHDL / Ethernet / OpenRISC processor / ASIC / Verilog / remote serial protocol / Simulation / RTOS / UART / / URL www.opencores.org / www.embecosm.com / www.icarus.com/eda/verilog / www.gnu.org/software/dejagnu/manual / opencores.org / www.veripool.org/wiki/verilator / www.jhauser.us/arithmetic/TestFloat.html / /
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